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GCC Code Coverage Report

Directory:	./		Exec	Total	Coverage
File:	lib/libm/arch/amd64/fenv.c	Lines:	95	112	84.8 %
Date:	2017-11-13	Branches:	1	2	50.0 %


/*	$OpenBSD: fenv.c,v 1.5 2016/09/12 19:47:01 guenther Exp $	*/
/*	$NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $	*/

/*-
 * Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 */

#include <fenv.h>
#include <machine/fpu.h>

/*
 * The following constant represents the default floating-point environment
 * (that is, the one installed at program startup) and has type pointer to
 * const-qualified fenv_t.
 *
 * It can be used as an argument to the functions within the <fenv.h> header
 * that manage the floating-point environment, namely fesetenv() and
 * feupdateenv().
 *
 * x87 fpu registers are 16bit wide. The upper bits, 31-16, are marked as
 * RESERVED.
 */
fenv_t __fe_dfl_env = {
	{
		0xffff0000 | __INITIAL_NPXCW__,	/* Control word register */
		0xffff0000,			/* Status word register */
		0xffffffff,			/* Tag word register */
		{
			0x00000000,
			0x00000000,
			0x00000000,
			0xffff0000
		}
	},
	__INITIAL_MXCSR__			/* MXCSR register */
};


/*
 * The feclearexcept() function clears the supported floating-point exceptions
 * represented by `excepts'.
 */
int
feclearexcept(int excepts)
{
	fenv_t fenv;
	unsigned int mxcsr;

	excepts &= FE_ALL_EXCEPT;

	/* Store the current x87 floating-point environment */
	__asm__ volatile ("fnstenv %0" : "=m" (fenv));

	/* Clear the requested floating-point exceptions */
	fenv.__x87.__status &= ~excepts;

	/* Load the x87 floating-point environent */
	__asm__ volatile ("fldenv %0" : : "m" (fenv));

	/* Same for SSE environment */
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
	mxcsr &= ~excepts;
	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));

	return (0);
}
DEF_STD(feclearexcept);

/*
 * The fegetexceptflag() function stores an implementation-defined
 * representation of the states of the floating-point status flags indicated by
 * the argument excepts in the object pointed to by the argument flagp.
 */
int
fegetexceptflag(fexcept_t *flagp, int excepts)
{
	unsigned short status;
	unsigned int mxcsr;

	excepts &= FE_ALL_EXCEPT;

	/* Store the current x87 status register */
	__asm__ volatile ("fnstsw %0" : "=am" (status));

	/* Store the MXCSR register */
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));

	/* Store the results in flagp */
	*flagp = (status | mxcsr) & excepts;

	return (0);
}

/*
 * The feraiseexcept() function raises the supported floating-point exceptions
 * represented by the argument `excepts'.
 *
 * The standard explicitly allows us to execute an instruction that has the
 * exception as a side effect, but we choose to manipulate the status register
 * directly.
 *
 * The validation of input is being deferred to fesetexceptflag().
 */
int
feraiseexcept(int excepts)
{
	excepts &= FE_ALL_EXCEPT;

	fesetexceptflag((fexcept_t *)&excepts, excepts);
	__asm__ volatile ("fwait");

	return (0);
}
DEF_STD(feraiseexcept);

/*
 * This function sets the floating-point status flags indicated by the argument
 * `excepts' to the states stored in the object pointed to by `flagp'. It does
 * NOT raise any floating-point exceptions, but only sets the state of the flags.
 */
int
fesetexceptflag(const fexcept_t *flagp, int excepts)
{
	fenv_t fenv;
	unsigned int mxcsr;

	excepts &= FE_ALL_EXCEPT;

	/* Store the current x87 floating-point environment */
	__asm__ volatile ("fnstenv %0" : "=m" (fenv));

	/* Set the requested status flags */
	fenv.__x87.__status &= ~excepts;
	fenv.__x87.__status |= *flagp & excepts;

	/* Load the x87 floating-point environent */
	__asm__ volatile ("fldenv %0" : : "m" (fenv));

	/* Same for SSE environment */
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
	mxcsr &= ~excepts;
	mxcsr |= *flagp & excepts;
	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));

	return (0);
}
DEF_STD(fesetexceptflag);

/*
 * The fetestexcept() function determines which of a specified subset of the
 * floating-point exception flags are currently set. The `excepts' argument
 * specifies the floating-point status flags to be queried.
 */
int
fetestexcept(int excepts)
{
	unsigned short status;
	unsigned int mxcsr;

	excepts &= FE_ALL_EXCEPT;

	/* Store the current x87 status register */
	__asm__ volatile ("fnstsw %0" : "=am" (status));

	/* Store the MXCSR register state */
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));

	return ((status | mxcsr) & excepts);
}
DEF_STD(fetestexcept);

/*
 * The fegetround() function gets the current rounding direction.
 */
int
fegetround(void)
{
	unsigned short control;

	/*
	 * We assume that the x87 and the SSE unit agree on the
	 * rounding mode.  Reading the control word on the x87 turns
	 * out to be about 5 times faster than reading it on the SSE
	 * unit on an Opteron 244.
	 */
	__asm__ volatile ("fnstcw %0" : "=m" (control));

	return (control & _X87_ROUND_MASK);
}
DEF_STD(fegetround);

/*
 * The fesetround() function establishes the rounding direction represented by
 * its argument `round'. If the argument is not equal to the value of a rounding
 * direction macro, the rounding direction is not changed.
 */
int
fesetround(int round)
{
	unsigned short control;
	unsigned int mxcsr;

	/* Check whether requested rounding direction is supported */
	if (round & ~_X87_ROUND_MASK)
		return (-1);

	/* Store the current x87 control word register */
	__asm__ volatile ("fnstcw %0" : "=m" (control));

	/* Set the rounding direction */
	control &= ~_X87_ROUND_MASK;
	control |= round;

	/* Load the x87 control word register */
	__asm__ volatile ("fldcw %0" : : "m" (control));

	/* Same for the SSE environment */
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
	mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT);
	mxcsr |= round << _SSE_ROUND_SHIFT;
	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));

	return (0);
}
DEF_STD(fesetround);

/*
 * The fegetenv() function attempts to store the current floating-point
 * environment in the object pointed to by envp.
 */
int
fegetenv(fenv_t *envp)
{
	/* Store the current x87 floating-point environment */
	__asm__ volatile ("fnstenv %0" : "=m" (*envp));

	/* Store the MXCSR register state */
	__asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));

	/*
	 * When an FNSTENV instruction is executed, all pending exceptions are
	 * essentially lost (either the x87 FPU status register is cleared or
	 * all exceptions are masked).
	 *
	 * 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
	 * Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
	 */
	__asm__ volatile ("fldcw %0" : : "m" (envp->__x87.__control));

	return (0);
}
DEF_STD(fegetenv);

/*
 * The feholdexcept() function saves the current floating-point environment
 * in the object pointed to by envp, clears the floating-point status flags, and
 * then installs a non-stop (continue on floating-point exceptions) mode, if
 * available, for all floating-point exceptions.
 */
int
feholdexcept(fenv_t *envp)
{
	unsigned int mxcsr;

	/* Store the current x87 floating-point environment */
	__asm__ volatile ("fnstenv %0" : "=m" (*envp));

	/* Clear all exception flags in FPU */
	__asm__ volatile ("fnclex");

	/* Store the MXCSR register state */
	__asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));

	/* Clear exception flags in MXCSR */
	mxcsr = envp->__mxcsr;
	mxcsr &= ~FE_ALL_EXCEPT;

	/* Mask all exceptions */
	mxcsr |= FE_ALL_EXCEPT << _SSE_MASK_SHIFT;

	/* Store the MXCSR register */
	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));

	return (0);
}
DEF_STD(feholdexcept);

/*
 * The fesetenv() function attempts to establish the floating-point environment
 * represented by the object pointed to by envp. The argument `envp' points
 * to an object set by a call to fegetenv() or feholdexcept(), or equal a
 * floating-point environment macro. The fesetenv() function does not raise
 * floating-point exceptions, but only installs the state of the floating-point
 * status flags represented through its argument.
 */
int
fesetenv(const fenv_t *envp)
{
	/* Load the x87 floating-point environent */
	__asm__ volatile ("fldenv %0" : : "m" (*envp));

	/* Store the MXCSR register */
	__asm__ volatile ("ldmxcsr %0" : : "m" (envp->__mxcsr));

	return (0);
}
DEF_STD(fesetenv);

/*
 * The feupdateenv() function saves the currently raised floating-point
 * exceptions in its automatic storage, installs the floating-point environment
 * represented by the object pointed to by `envp', and then raises the saved
 * floating-point exceptions. The argument `envp' shall point to an object set
 * by a call to feholdexcept() or fegetenv(), or equal a floating-point
 * environment macro.
 */
int
feupdateenv(const fenv_t *envp)
{
	unsigned short status;
	unsigned int mxcsr;

	/* Store the x87 status register */
	__asm__ volatile ("fnstsw %0" : "=am" (status));

	/* Store the MXCSR register */
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));

	/* Install new floating-point environment */
	fesetenv(envp);

	/* Raise any previously accumulated exceptions */
	feraiseexcept(status | mxcsr);

	return (0);
}
DEF_STD(feupdateenv);

/*
 * The following functions are extentions to the standard
 */
int
feenableexcept(int mask)
{
	unsigned int mxcsr, omask;
	unsigned short control;

	mask &= FE_ALL_EXCEPT;

	__asm__ volatile ("fnstcw %0" : "=m" (control));
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));

	omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
	control &= ~mask;
	__asm__ volatile ("fldcw %0" : : "m" (control));

	mxcsr &= ~(mask << _SSE_MASK_SHIFT);
	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));

	return (omask);
}

int
fedisableexcept(int mask)
{
	unsigned int mxcsr, omask;
	unsigned short control;

	mask &= FE_ALL_EXCEPT;

	__asm__ volatile ("fnstcw %0" : "=m" (control));
	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));

	omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
	control |= mask;
	__asm__ volatile ("fldcw %0" : : "m" (control));

	mxcsr |= mask << _SSE_MASK_SHIFT;
	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));

	return (omask);
}

int
fegetexcept(void)
{
	unsigned short control;

	/*
	 * We assume that the masks for the x87 and the SSE unit are
	 * the same.
	 */
	__asm__ volatile ("fnstcw %0" : "=m" (control));

	return (~control & FE_ALL_EXCEPT);
}


Generated by: GCOVR (Version 3.3)

Line	Branch	Exec	Source
1			/* $OpenBSD: fenv.c,v 1.5 2016/09/12 19:47:01 guenther Exp $ */
2			/* $NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $ */
3
4			/*-
5			* Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
6			* All rights reserved.
7			*
8			* Redistribution and use in source and binary forms, with or without
9			* modification, are permitted provided that the following conditions
10			* are met:
11			* 1. Redistributions of source code must retain the above copyright
12			* notice, this list of conditions and the following disclaimer.
13			* 2. Redistributions in binary form must reproduce the above copyright
14			* notice, this list of conditions and the following disclaimer in the
15			* documentation and/or other materials provided with the distribution.
16			*
17			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27			* SUCH DAMAGE.
28			*/
29
30			#include <fenv.h>
31			#include <machine/fpu.h>
32
33			/*
34			* The following constant represents the default floating-point environment
35			* (that is, the one installed at program startup) and has type pointer to
36			* const-qualified fenv_t.
37			*
38			* It can be used as an argument to the functions within the <fenv.h> header
39			* that manage the floating-point environment, namely fesetenv() and
40			* feupdateenv().
41			*
42			* x87 fpu registers are 16bit wide. The upper bits, 31-16, are marked as
43			* RESERVED.
44			*/
45			fenv_t __fe_dfl_env = {
46			{
47			0xffff0000 \| __INITIAL_NPXCW__, /* Control word register */
48			0xffff0000, /* Status word register */
49			0xffffffff, /* Tag word register */
50			{
51			0x00000000,
52			0x00000000,
53			0x00000000,
54			0xffff0000
55			}
56			},
57			__INITIAL_MXCSR__ /* MXCSR register */
58			};
59
60
61			/*
62			* The feclearexcept() function clears the supported floating-point exceptions
63			* represented by `excepts'.
64			*/
65			int
66			feclearexcept(int excepts)
67			{
68		1058	fenv_t fenv;
69		529	unsigned int mxcsr;
70
71		529	excepts &= FE_ALL_EXCEPT;
72
73			/* Store the current x87 floating-point environment */
74		529	__asm__ volatile ("fnstenv %0" : "=m" (fenv));
75
76			/* Clear the requested floating-point exceptions */
77		529	fenv.__x87.__status &= ~excepts;
78
79			/* Load the x87 floating-point environent */
80		529	__asm__ volatile ("fldenv %0" : : "m" (fenv));
81
82			/* Same for SSE environment */
83		529	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
84		529	mxcsr &= ~excepts;
85		529	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
86
87		529	return (0);
88		529	}
89			DEF_STD(feclearexcept);
90
91			/*
92			* The fegetexceptflag() function stores an implementation-defined
93			* representation of the states of the floating-point status flags indicated by
94			* the argument excepts in the object pointed to by the argument flagp.
95			*/
96			int
97			fegetexceptflag(fexcept_t *flagp, int excepts)
98			{
99		384	unsigned short status;
100		192	unsigned int mxcsr;
101
102		192	excepts &= FE_ALL_EXCEPT;
103
104			/* Store the current x87 status register */
105		192	__asm__ volatile ("fnstsw %0" : "=am" (status));
106
107			/* Store the MXCSR register */
108		192	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
109
110			/* Store the results in flagp */
111		192	*flagp = (status \| mxcsr) & excepts;
112
113		192	return (0);
114		192	}
115
116			/*
117			* The feraiseexcept() function raises the supported floating-point exceptions
118			* represented by the argument `excepts'.
119			*
120			* The standard explicitly allows us to execute an instruction that has the
121			* exception as a side effect, but we choose to manipulate the status register
122			* directly.
123			*
124			* The validation of input is being deferred to fesetexceptflag().
125			*/
126			int
127			feraiseexcept(int excepts)
128			{
129		204	excepts &= FE_ALL_EXCEPT;
130
131		102	fesetexceptflag((fexcept_t *)&excepts, excepts);
132		102	__asm__ volatile ("fwait");
133
134		102	return (0);
135			}
136			DEF_STD(feraiseexcept);
137
138			/*
139			* This function sets the floating-point status flags indicated by the argument
140			* `excepts' to the states stored in the object pointed to by `flagp'. It does
141			* NOT raise any floating-point exceptions, but only sets the state of the flags.
142			*/
143			int
144			fesetexceptflag(const fexcept_t *flagp, int excepts)
145			{
146		780	fenv_t fenv;
147		390	unsigned int mxcsr;
148
149		390	excepts &= FE_ALL_EXCEPT;
150
151			/* Store the current x87 floating-point environment */
152		390	__asm__ volatile ("fnstenv %0" : "=m" (fenv));
153
154			/* Set the requested status flags */
155		390	fenv.__x87.__status &= ~excepts;
156		390	fenv.__x87.__status \|= *flagp & excepts;
157
158			/* Load the x87 floating-point environent */
159		390	__asm__ volatile ("fldenv %0" : : "m" (fenv));
160
161			/* Same for SSE environment */
162		390	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
163		390	mxcsr &= ~excepts;
164		390	mxcsr \|= *flagp & excepts;
165		390	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
166
167		390	return (0);
168		390	}
169			DEF_STD(fesetexceptflag);
170
171			/*
172			* The fetestexcept() function determines which of a specified subset of the
173			* floating-point exception flags are currently set. The `excepts' argument
174			* specifies the floating-point status flags to be queried.
175			*/
176			int
177			fetestexcept(int excepts)
178			{
179		2930	unsigned short status;
180		1465	unsigned int mxcsr;
181
182		1465	excepts &= FE_ALL_EXCEPT;
183
184			/* Store the current x87 status register */
185		1465	__asm__ volatile ("fnstsw %0" : "=am" (status));
186
187			/* Store the MXCSR register state */
188		1465	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
189
190		2930	return ((status \| mxcsr) & excepts);
191		1465	}
192			DEF_STD(fetestexcept);
193
194			/*
195			* The fegetround() function gets the current rounding direction.
196			*/
197			int
198			fegetround(void)
199			{
200		792	unsigned short control;
201
202			/*
203			* We assume that the x87 and the SSE unit agree on the
204			* rounding mode. Reading the control word on the x87 turns
205			* out to be about 5 times faster than reading it on the SSE
206			* unit on an Opteron 244.
207			*/
208		396	__asm__ volatile ("fnstcw %0" : "=m" (control));
209
210		792	return (control & _X87_ROUND_MASK);
211		396	}
212			DEF_STD(fegetround);
213
214			/*
215			* The fesetround() function establishes the rounding direction represented by
216			* its argument `round'. If the argument is not equal to the value of a rounding
217			* direction macro, the rounding direction is not changed.
218			*/
219			int
220			fesetround(int round)
221			{
222		216	unsigned short control;
223		108	unsigned int mxcsr;
224
225			/* Check whether requested rounding direction is supported */
226	✗✓	108	if (round & ~_X87_ROUND_MASK)
227			return (-1);
228
229			/* Store the current x87 control word register */
230		108	__asm__ volatile ("fnstcw %0" : "=m" (control));
231
232			/* Set the rounding direction */
233		108	control &= ~_X87_ROUND_MASK;
234		108	control \|= round;
235
236			/* Load the x87 control word register */
237		108	__asm__ volatile ("fldcw %0" : : "m" (control));
238
239			/* Same for the SSE environment */
240		108	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
241		108	mxcsr &= ~(_X87_ROUND_MASK << _SSE_ROUND_SHIFT);
242		108	mxcsr \|= round << _SSE_ROUND_SHIFT;
243		108	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
244
245		108	return (0);
246		108	}
247			DEF_STD(fesetround);
248
249			/*
250			* The fegetenv() function attempts to store the current floating-point
251			* environment in the object pointed to by envp.
252			*/
253			int
254			fegetenv(fenv_t *envp)
255			{
256			/* Store the current x87 floating-point environment */
257		390	__asm__ volatile ("fnstenv %0" : "=m" (*envp));
258
259			/* Store the MXCSR register state */
260		195	__asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
261
262			/*
263			* When an FNSTENV instruction is executed, all pending exceptions are
264			* essentially lost (either the x87 FPU status register is cleared or
265			* all exceptions are masked).
266			*
267			* 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
268			* Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
269			*/
270		195	__asm__ volatile ("fldcw %0" : : "m" (envp->__x87.__control));
271
272		195	return (0);
273			}
274			DEF_STD(fegetenv);
275
276			/*
277			* The feholdexcept() function saves the current floating-point environment
278			* in the object pointed to by envp, clears the floating-point status flags, and
279			* then installs a non-stop (continue on floating-point exceptions) mode, if
280			* available, for all floating-point exceptions.
281			*/
282			int
283			feholdexcept(fenv_t *envp)
284			{
285			unsigned int mxcsr;
286
287			/* Store the current x87 floating-point environment */
288			__asm__ volatile ("fnstenv %0" : "=m" (*envp));
289
290			/* Clear all exception flags in FPU */
291			__asm__ volatile ("fnclex");
292
293			/* Store the MXCSR register state */
294			__asm__ volatile ("stmxcsr %0" : "=m" (envp->__mxcsr));
295
296			/* Clear exception flags in MXCSR */
297			mxcsr = envp->__mxcsr;
298			mxcsr &= ~FE_ALL_EXCEPT;
299
300			/* Mask all exceptions */
301			mxcsr \|= FE_ALL_EXCEPT << _SSE_MASK_SHIFT;
302
303			/* Store the MXCSR register */
304			__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
305
306			return (0);
307			}
308			DEF_STD(feholdexcept);
309
310			/*
311			* The fesetenv() function attempts to establish the floating-point environment
312			* represented by the object pointed to by envp. The argument `envp' points
313			* to an object set by a call to fegetenv() or feholdexcept(), or equal a
314			* floating-point environment macro. The fesetenv() function does not raise
315			* floating-point exceptions, but only installs the state of the floating-point
316			* status flags represented through its argument.
317			*/
318			int
319			fesetenv(const fenv_t *envp)
320			{
321			/* Load the x87 floating-point environent */
322		576	__asm__ volatile ("fldenv %0" : : "m" (*envp));
323
324			/* Store the MXCSR register */
325		288	__asm__ volatile ("ldmxcsr %0" : : "m" (envp->__mxcsr));
326
327		288	return (0);
328			}
329			DEF_STD(fesetenv);
330
331			/*
332			* The feupdateenv() function saves the currently raised floating-point
333			* exceptions in its automatic storage, installs the floating-point environment
334			* represented by the object pointed to by `envp', and then raises the saved
335			* floating-point exceptions. The argument `envp' shall point to an object set
336			* by a call to feholdexcept() or fegetenv(), or equal a floating-point
337			* environment macro.
338			*/
339			int
340			feupdateenv(const fenv_t *envp)
341			{
342			unsigned short status;
343			unsigned int mxcsr;
344
345			/* Store the x87 status register */
346			__asm__ volatile ("fnstsw %0" : "=am" (status));
347
348			/* Store the MXCSR register */
349			__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
350
351			/* Install new floating-point environment */
352			fesetenv(envp);
353
354			/* Raise any previously accumulated exceptions */
355			feraiseexcept(status \| mxcsr);
356
357			return (0);
358			}
359			DEF_STD(feupdateenv);
360
361			/*
362			* The following functions are extentions to the standard
363			*/
364			int
365			feenableexcept(int mask)
366			{
367		12	unsigned int mxcsr, omask;
368		6	unsigned short control;
369
370		6	mask &= FE_ALL_EXCEPT;
371
372		6	__asm__ volatile ("fnstcw %0" : "=m" (control));
373		6	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
374
375		6	omask = ~(control \| (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
376		6	control &= ~mask;
377		6	__asm__ volatile ("fldcw %0" : : "m" (control));
378
379		6	mxcsr &= ~(mask << _SSE_MASK_SHIFT);
380		6	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
381
382		6	return (omask);
383		6	}
384
385			int
386			fedisableexcept(int mask)
387			{
388		12	unsigned int mxcsr, omask;
389		6	unsigned short control;
390
391		6	mask &= FE_ALL_EXCEPT;
392
393		6	__asm__ volatile ("fnstcw %0" : "=m" (control));
394		6	__asm__ volatile ("stmxcsr %0" : "=m" (mxcsr));
395
396		6	omask = ~(control \| (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
397		6	control \|= mask;
398		6	__asm__ volatile ("fldcw %0" : : "m" (control));
399
400		6	mxcsr \|= mask << _SSE_MASK_SHIFT;
401		6	__asm__ volatile ("ldmxcsr %0" : : "m" (mxcsr));
402
403		6	return (omask);
404		6	}
405
406			int
407			fegetexcept(void)
408			{
409		18	unsigned short control;
410
411			/*
412			* We assume that the masks for the x87 and the SSE unit are
413			* the same.
414			*/
415		9	__asm__ volatile ("fnstcw %0" : "=m" (control));
416
417		18	return (~control & FE_ALL_EXCEPT);
418		9	}