Line data Source code
1 : /* $OpenBSD: ipgphy.c,v 1.19 2015/07/19 06:28:12 yuo Exp $ */
2 :
3 : /*-
4 : * Copyright (c) 2006, Pyun YongHyeon <yongari@FreeBSD.org>
5 : * All rights reserved.
6 : *
7 : * Redistribution and use in source and binary forms, with or without
8 : * modification, are permitted provided that the following conditions
9 : * are met:
10 : * 1. Redistributions of source code must retain the above copyright
11 : * notice unmodified, this list of conditions, and the following
12 : * disclaimer.
13 : * 2. Redistributions in binary form must reproduce the above copyright
14 : * notice, this list of conditions and the following disclaimer in the
15 : * documentation and/or other materials provided with the distribution.
16 : *
17 : * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 : * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 : * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 : * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 : * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 : * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 : * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 : * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 : * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 : * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 : * SUCH DAMAGE.
28 : *
29 : */
30 :
31 : /*
32 : * Driver for the IC Plus IP1000A/IP1001 10/100/1000 PHY.
33 : */
34 :
35 : #include <sys/param.h>
36 : #include <sys/systm.h>
37 : #include <sys/kernel.h>
38 : #include <sys/device.h>
39 : #include <sys/socket.h>
40 : #include <sys/errno.h>
41 :
42 : #include <machine/bus.h>
43 :
44 : #include <net/if.h>
45 : #include <net/if_media.h>
46 :
47 : #include <netinet/in.h>
48 : #include <netinet/if_ether.h>
49 :
50 : #include <dev/mii/mii.h>
51 : #include <dev/mii/miivar.h>
52 : #include <dev/mii/miidevs.h>
53 :
54 : #include <dev/mii/ipgphyreg.h>
55 :
56 : #include <dev/pci/if_stgereg.h>
57 :
58 : int ipgphy_probe(struct device *, void *, void *);
59 : void ipgphy_attach(struct device *, struct device *, void *);
60 :
61 : struct cfattach ipgphy_ca = {
62 : sizeof(struct mii_softc), ipgphy_probe, ipgphy_attach, mii_phy_detach
63 : };
64 :
65 : struct cfdriver ipgphy_cd = {
66 : NULL, "ipgphy", DV_DULL
67 : };
68 :
69 : int ipgphy_service(struct mii_softc *, struct mii_data *, int);
70 : void ipgphy_status(struct mii_softc *);
71 : int ipgphy_mii_phy_auto(struct mii_softc *);
72 : void ipgphy_load_dspcode(struct mii_softc *);
73 : void ipgphy_reset(struct mii_softc *);
74 :
75 : const struct mii_phy_funcs ipgphy_funcs = {
76 : ipgphy_service, ipgphy_status, ipgphy_reset,
77 : };
78 :
79 : static const struct mii_phydesc ipgphys[] = {
80 : { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP1000A,
81 : MII_STR_ICPLUS_IP1000A },
82 : { MII_OUI_ICPLUS, MII_MODEL_ICPLUS_IP1001,
83 : MII_STR_ICPLUS_IP1001 },
84 :
85 : { 0,
86 : 0 },
87 : };
88 :
89 : int
90 0 : ipgphy_probe(struct device *parent, void *match, void *aux)
91 : {
92 0 : struct mii_attach_args *ma = aux;
93 :
94 0 : if (mii_phy_match(ma, ipgphys) != NULL)
95 0 : return (10);
96 :
97 0 : return (0);
98 0 : }
99 :
100 : void
101 0 : ipgphy_attach(struct device *parent, struct device *self, void *aux)
102 : {
103 0 : struct mii_softc *sc = (struct mii_softc *)self;
104 0 : struct mii_attach_args *ma = aux;
105 0 : struct mii_data *mii = ma->mii_data;
106 : const struct mii_phydesc *mpd;
107 :
108 0 : mpd = mii_phy_match(ma, ipgphys);
109 0 : printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
110 :
111 0 : sc->mii_inst = mii->mii_instance;
112 0 : sc->mii_phy = ma->mii_phyno;
113 0 : sc->mii_funcs = &ipgphy_funcs;
114 0 : sc->mii_model = MII_MODEL(ma->mii_id2);
115 0 : sc->mii_pdata = mii;
116 0 : sc->mii_flags = ma->mii_flags;
117 :
118 0 : sc->mii_flags |= MIIF_NOISOLATE;
119 :
120 0 : PHY_RESET(sc);
121 :
122 0 : sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
123 0 : if (sc->mii_capabilities & BMSR_EXTSTAT)
124 0 : sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
125 :
126 0 : mii_phy_add_media(sc);
127 :
128 0 : }
129 :
130 : int
131 0 : ipgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
132 : {
133 0 : struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
134 : uint32_t gig, reg, speed;
135 :
136 0 : switch (cmd) {
137 : case MII_POLLSTAT:
138 : /*
139 : * If we're not polling our PHY instance, just return.
140 : */
141 0 : if (IFM_INST(ife->ifm_media) != sc->mii_inst)
142 0 : return (0);
143 : break;
144 :
145 : case MII_MEDIACHG:
146 : /*
147 : * If the media indicates a different PHY instance,
148 : * isolate ourselves.
149 : */
150 0 : if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
151 0 : reg = PHY_READ(sc, MII_BMCR);
152 0 : PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
153 0 : return (0);
154 : }
155 :
156 : /*
157 : * If the interface is not up, don't do anything.
158 : */
159 0 : if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
160 : break;
161 :
162 0 : PHY_RESET(sc);
163 :
164 0 : switch (IFM_SUBTYPE(ife->ifm_media)) {
165 : case IFM_AUTO:
166 0 : (void)ipgphy_mii_phy_auto(sc);
167 0 : goto done;
168 : break;
169 :
170 : case IFM_1000_T:
171 : /*
172 : * XXX
173 : * Manual 1000baseT setting doesn't seem to work.
174 : */
175 : speed = BMCR_S1000;
176 0 : break;
177 :
178 : case IFM_100_TX:
179 : speed = BMCR_S100;
180 0 : break;
181 :
182 : case IFM_10_T:
183 : speed = BMCR_S10;
184 0 : break;
185 :
186 : default:
187 0 : return (EINVAL);
188 : }
189 :
190 0 : if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) {
191 0 : speed |= BMCR_FDX;
192 : gig = GTCR_ADV_1000TFDX;
193 0 : } else
194 : gig = GTCR_ADV_1000THDX;
195 :
196 0 : PHY_WRITE(sc, MII_100T2CR, 0);
197 0 : PHY_WRITE(sc, MII_BMCR, speed);
198 :
199 0 : if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
200 : break;
201 :
202 0 : PHY_WRITE(sc, MII_100T2CR, gig);
203 0 : PHY_WRITE(sc, MII_BMCR, speed);
204 :
205 0 : if (mii->mii_media.ifm_media & IFM_ETH_MASTER)
206 0 : gig |= GTCR_MAN_MS | GTCR_ADV_MS;
207 :
208 0 : PHY_WRITE(sc, MII_100T2CR, gig);
209 :
210 : done:
211 : break;
212 :
213 : case MII_TICK:
214 : /*
215 : * If we're not currently selected, just return.
216 : */
217 0 : if (IFM_INST(ife->ifm_media) != sc->mii_inst)
218 0 : return (0);
219 :
220 : /*
221 : * Is the interface even up?
222 : */
223 0 : if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
224 0 : return (0);
225 :
226 : /*
227 : * Only used for autonegotiation.
228 : */
229 0 : if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
230 0 : sc->mii_ticks = 0;
231 0 : break;
232 : }
233 :
234 : /*
235 : * check for link.
236 : */
237 0 : reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
238 0 : if (reg & BMSR_LINK) {
239 0 : sc->mii_ticks = 0;
240 0 : break;
241 : }
242 :
243 : /* Announce link loss right after it happens */
244 0 : if (sc->mii_ticks++ == 0)
245 : break;
246 :
247 : /*
248 : * Only retry autonegotiation every mii_anegticks seconds.
249 : */
250 0 : if (sc->mii_ticks <= sc->mii_anegticks)
251 : break;
252 :
253 0 : sc->mii_ticks = 0;
254 0 : ipgphy_mii_phy_auto(sc);
255 0 : break;
256 : }
257 :
258 : /* Update the media status. */
259 0 : mii_phy_status(sc);
260 :
261 : /* Callback if something changed. */
262 0 : mii_phy_update(sc, cmd);
263 0 : return (0);
264 0 : }
265 :
266 : void
267 0 : ipgphy_status(struct mii_softc *sc)
268 : {
269 0 : struct mii_data *mii = sc->mii_pdata;
270 0 : struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
271 : uint32_t bmsr, bmcr, stat;
272 :
273 0 : mii->mii_media_status = IFM_AVALID;
274 0 : mii->mii_media_active = IFM_ETHER;
275 :
276 0 : bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
277 0 : if (bmsr & BMSR_LINK)
278 0 : mii->mii_media_status |= IFM_ACTIVE;
279 :
280 0 : bmcr = PHY_READ(sc, MII_BMCR);
281 0 : if (bmcr & BMCR_LOOP)
282 0 : mii->mii_media_active |= IFM_LOOP;
283 :
284 0 : if (bmcr & BMCR_AUTOEN) {
285 0 : if ((bmsr & BMSR_ACOMP) == 0) {
286 : /* Erg, still trying, I guess... */
287 0 : mii->mii_media_active |= IFM_NONE;
288 0 : return;
289 : }
290 :
291 0 : if (sc->mii_model == MII_MODEL_ICPLUS_IP1001) {
292 0 : stat = PHY_READ(sc, IPGPHY_LSR);
293 0 : switch (stat & IPGPHY_LSR_SPEED_MASK) {
294 : case IPGPHY_LSR_SPEED_10:
295 0 : mii->mii_media_active |= IFM_10_T;
296 0 : break;
297 : case IPGPHY_LSR_SPEED_100:
298 0 : mii->mii_media_active |= IFM_100_TX;
299 0 : break;
300 : case IPGPHY_LSR_SPEED_1000:
301 0 : mii->mii_media_active |= IFM_1000_T;
302 0 : break;
303 : default:
304 0 : mii->mii_media_active |= IFM_NONE;
305 0 : return;
306 : }
307 :
308 0 : if (stat & IPGPHY_LSR_FULL_DUPLEX)
309 0 : mii->mii_media_active |= IFM_FDX;
310 : else
311 0 : mii->mii_media_active |= IFM_HDX;
312 : } else {
313 0 : stat = PHY_READ(sc, STGE_PhyCtrl);
314 0 : switch (PC_LinkSpeed(stat)) {
315 : case PC_LinkSpeed_Down:
316 0 : mii->mii_media_active |= IFM_NONE;
317 0 : return;
318 : case PC_LinkSpeed_10:
319 0 : mii->mii_media_active |= IFM_10_T;
320 0 : break;
321 : case PC_LinkSpeed_100:
322 0 : mii->mii_media_active |= IFM_100_TX;
323 0 : break;
324 : case PC_LinkSpeed_1000:
325 0 : mii->mii_media_active |= IFM_1000_T;
326 0 : break;
327 : default:
328 : mii->mii_media_active |= IFM_NONE;
329 : return;
330 : }
331 :
332 0 : if (stat & PC_PhyDuplexStatus)
333 0 : mii->mii_media_active |= IFM_FDX;
334 : else
335 0 : mii->mii_media_active |= IFM_HDX;
336 : }
337 :
338 0 : if (mii->mii_media_active & IFM_FDX)
339 0 : mii->mii_media_active |= mii_phy_flowstatus(sc);
340 :
341 0 : if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
342 0 : if (PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES)
343 0 : mii->mii_media_active |= IFM_ETH_MASTER;
344 : }
345 : } else
346 0 : mii->mii_media_active = ife->ifm_media;
347 0 : }
348 :
349 : int
350 0 : ipgphy_mii_phy_auto(struct mii_softc *sc)
351 : {
352 : uint32_t reg = 0;
353 :
354 0 : if (sc->mii_model == MII_MODEL_ICPLUS_IP1001) {
355 0 : reg = PHY_READ(sc, MII_ANAR);
356 0 : reg &= ~(ANAR_PAUSE_SYM | ANAR_PAUSE_ASYM);
357 0 : reg |= ANAR_NP;
358 0 : }
359 :
360 0 : reg |= ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD;
361 :
362 0 : if (sc->mii_flags & MIIF_DOPAUSE)
363 0 : reg |= ANAR_PAUSE_SYM | ANAR_PAUSE_ASYM;
364 :
365 0 : PHY_WRITE(sc, MII_ANAR, reg | ANAR_CSMA);
366 :
367 : reg = GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
368 0 : if (sc->mii_model != MII_MODEL_ICPLUS_IP1001)
369 0 : reg |= GTCR_ADV_MS;
370 0 : PHY_WRITE(sc, MII_100T2CR, reg);
371 :
372 0 : PHY_WRITE(sc, MII_BMCR, (BMCR_FDX | BMCR_AUTOEN | BMCR_STARTNEG));
373 :
374 0 : return (EJUSTRETURN);
375 : }
376 :
377 : void
378 0 : ipgphy_load_dspcode(struct mii_softc *sc)
379 : {
380 0 : PHY_WRITE(sc, 31, 0x0001);
381 0 : PHY_WRITE(sc, 27, 0x01e0);
382 0 : PHY_WRITE(sc, 31, 0x0002);
383 0 : PHY_WRITE(sc, 27, 0xeb8e);
384 0 : PHY_WRITE(sc, 31, 0x0000);
385 0 : PHY_WRITE(sc, 30, 0x005e);
386 0 : PHY_WRITE(sc, 9, 0x0700);
387 :
388 0 : DELAY(50);
389 0 : }
390 :
391 : void
392 0 : ipgphy_reset(struct mii_softc *sc)
393 : {
394 0 : struct ifnet *ifp = sc->mii_pdata->mii_ifp;
395 : struct stge_softc *stge_sc;
396 : uint32_t reg;
397 :
398 0 : mii_phy_reset(sc);
399 :
400 : /* clear autoneg/full-duplex as we don't want it after reset */
401 0 : reg = PHY_READ(sc, MII_BMCR);
402 0 : reg &= ~(BMCR_AUTOEN | BMCR_FDX);
403 0 : PHY_WRITE(sc, MII_BMCR, reg);
404 :
405 0 : if (sc->mii_model == MII_MODEL_ICPLUS_IP1000A &&
406 0 : strcmp(ifp->if_xname, "stge") == 0) {
407 0 : stge_sc = ifp->if_softc;
408 0 : if (stge_sc->sc_rev >= 0x40 && stge_sc->sc_rev <= 0x4e)
409 0 : ipgphy_load_dspcode(sc);
410 : }
411 0 : }
|
