Line data Source code
1 : /* $OpenBSD: mii_physubr.c,v 1.45 2015/09/11 13:02:28 stsp Exp $ */
2 : /* $NetBSD: mii_physubr.c,v 1.20 2001/04/13 23:30:09 thorpej Exp $ */
3 :
4 : /*-
5 : * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
6 : * All rights reserved.
7 : *
8 : * This code is derived from software contributed to The NetBSD Foundation
9 : * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 : * NASA Ames Research Center.
11 : *
12 : * Redistribution and use in source and binary forms, with or without
13 : * modification, are permitted provided that the following conditions
14 : * are met:
15 : * 1. Redistributions of source code must retain the above copyright
16 : * notice, this list of conditions and the following disclaimer.
17 : * 2. Redistributions in binary form must reproduce the above copyright
18 : * notice, this list of conditions and the following disclaimer in the
19 : * documentation and/or other materials provided with the distribution.
20 : *
21 : * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 : * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 : * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 : * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 : * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 : * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 : * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 : * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 : * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 : * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 : * POSSIBILITY OF SUCH DAMAGE.
32 : */
33 :
34 : /*
35 : * Subroutines common to all PHYs.
36 : */
37 :
38 : #include <sys/param.h>
39 : #include <sys/device.h>
40 : #include <sys/systm.h>
41 : #include <sys/kernel.h>
42 : #include <sys/socket.h>
43 : #include <sys/errno.h>
44 :
45 : #include <net/if.h>
46 : #include <net/if_var.h>
47 : #include <net/if_media.h>
48 :
49 : #include <dev/mii/mii.h>
50 : #include <dev/mii/miivar.h>
51 :
52 : /*
53 : * Media to register setting conversion table. Order matters.
54 : * XXX 802.3 doesn't specify ANAR or ANLPAR bits for 1000base.
55 : */
56 : const struct mii_media mii_media_table[] = {
57 : /* None */
58 : { BMCR_ISO, ANAR_CSMA, 0 },
59 : /* 10baseT */
60 : { BMCR_S10, ANAR_CSMA|ANAR_10, 0 },
61 : /* 10baseT-FDX */
62 : { BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 0 },
63 : /* 100baseT4 */
64 : { BMCR_S100, ANAR_CSMA|ANAR_T4, 0 },
65 : /* 100baseTX */
66 : { BMCR_S100, ANAR_CSMA|ANAR_TX, 0 },
67 : /* 100baseTX-FDX */
68 : { BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 0 },
69 : /* 1000baseX */
70 : { BMCR_S1000, ANAR_CSMA, 0 },
71 : /* 1000baseX-FDX */
72 : { BMCR_S1000|BMCR_FDX, ANAR_CSMA, 0 },
73 : /* 1000baseT */
74 : { BMCR_S1000, ANAR_CSMA, GTCR_ADV_1000THDX },
75 : /* 1000baseT-FDX */
76 : { BMCR_S1000|BMCR_FDX, ANAR_CSMA, GTCR_ADV_1000TFDX },
77 : };
78 :
79 : void
80 0 : mii_phy_setmedia(struct mii_softc *sc)
81 : {
82 0 : struct mii_data *mii = sc->mii_pdata;
83 0 : struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
84 : int bmcr, anar, gtcr;
85 :
86 0 : if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) {
87 0 : if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
88 0 : (sc->mii_flags & MIIF_FORCEANEG))
89 0 : (void) mii_phy_auto(sc, 1);
90 0 : return;
91 : }
92 :
93 : /*
94 : * Table index is stored in the media entry.
95 : */
96 : #ifdef DIAGNOSTIC
97 0 : if (ife->ifm_data >= MII_NMEDIA)
98 0 : panic("mii_phy_setmedia");
99 : #endif
100 :
101 0 : anar = mii_media_table[ife->ifm_data].mm_anar;
102 0 : bmcr = mii_media_table[ife->ifm_data].mm_bmcr;
103 0 : gtcr = mii_media_table[ife->ifm_data].mm_gtcr;
104 :
105 0 : if (mii->mii_media.ifm_media & IFM_ETH_MASTER) {
106 0 : switch (IFM_SUBTYPE(ife->ifm_media)) {
107 : case IFM_1000_T:
108 0 : gtcr |= GTCR_MAN_MS|GTCR_ADV_MS;
109 : break;
110 :
111 : default:
112 0 : panic("mii_phy_setmedia: MASTER on wrong media");
113 : }
114 0 : }
115 :
116 0 : if (ife->ifm_media & IFM_LOOP)
117 0 : bmcr |= BMCR_LOOP;
118 :
119 0 : PHY_WRITE(sc, MII_ANAR, anar);
120 0 : PHY_WRITE(sc, MII_BMCR, bmcr);
121 0 : if (sc->mii_flags & MIIF_HAVE_GTCR)
122 0 : PHY_WRITE(sc, MII_100T2CR, gtcr);
123 0 : }
124 :
125 : int
126 0 : mii_phy_auto(struct mii_softc *sc, int waitfor)
127 : {
128 : int bmsr, i;
129 :
130 0 : if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
131 : /*
132 : * Check for 1000BASE-X. Autonegotiation is a bit
133 : * different on such devices.
134 : */
135 0 : if (sc->mii_flags & MIIF_IS_1000X) {
136 : uint16_t anar = 0;
137 :
138 0 : if (sc->mii_extcapabilities & EXTSR_1000XFDX)
139 0 : anar |= ANAR_X_FD;
140 0 : if (sc->mii_extcapabilities & EXTSR_1000XHDX)
141 0 : anar |= ANAR_X_HD;
142 :
143 0 : if (sc->mii_flags & MIIF_DOPAUSE &&
144 0 : sc->mii_extcapabilities & EXTSR_1000XFDX)
145 0 : anar |= ANAR_X_PAUSE_TOWARDS;
146 :
147 0 : PHY_WRITE(sc, MII_ANAR, anar);
148 0 : } else {
149 : uint16_t anar;
150 :
151 0 : anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
152 : ANAR_CSMA;
153 : /*
154 : * Most 100baseTX PHY's only support symmetric
155 : * PAUSE, so we don't advertise asymmetric
156 : * PAUSE unless we also have 1000baseT capability.
157 : */
158 0 : if (sc->mii_flags & MIIF_DOPAUSE) {
159 0 : if (sc->mii_capabilities & BMSR_100TXFDX)
160 0 : anar |= ANAR_FC;
161 0 : if (sc->mii_extcapabilities & EXTSR_1000TFDX)
162 0 : anar |= ANAR_PAUSE_TOWARDS;
163 : }
164 0 : PHY_WRITE(sc, MII_ANAR, anar);
165 0 : if (sc->mii_flags & MIIF_HAVE_GTCR) {
166 : uint16_t gtcr = 0;
167 :
168 0 : if (sc->mii_extcapabilities & EXTSR_1000TFDX)
169 0 : gtcr |= GTCR_ADV_1000TFDX;
170 0 : if (sc->mii_extcapabilities & EXTSR_1000THDX)
171 0 : gtcr |= GTCR_ADV_1000THDX;
172 :
173 0 : PHY_WRITE(sc, MII_100T2CR, gtcr);
174 0 : }
175 : }
176 0 : PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
177 0 : }
178 :
179 0 : if (waitfor) {
180 : /* Wait 500ms for it to complete. */
181 0 : for (i = 0; i < 500; i++) {
182 0 : if ((bmsr = PHY_READ(sc, MII_BMSR)) & BMSR_ACOMP)
183 0 : return (0);
184 0 : delay(1000);
185 : }
186 :
187 : /*
188 : * Don't need to worry about clearing MIIF_DOINGAUTO.
189 : * If that's set, a timeout is pending, and it will
190 : * clear the flag.
191 : */
192 0 : return (EIO);
193 : }
194 :
195 : /*
196 : * Just let it finish asynchronously. This is for the benefit of
197 : * the tick handler driving autonegotiation. Don't want 500ms
198 : * delays all the time while the system is running!
199 : */
200 0 : if (sc->mii_flags & MIIF_AUTOTSLEEP) {
201 0 : sc->mii_flags |= MIIF_DOINGAUTO;
202 0 : tsleep(&sc->mii_flags, PZERO, "miiaut", hz >> 1);
203 0 : mii_phy_auto_timeout(sc);
204 0 : } else if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
205 0 : sc->mii_flags |= MIIF_DOINGAUTO;
206 0 : timeout_set(&sc->mii_phy_timo, mii_phy_auto_timeout, sc);
207 0 : timeout_add_msec(&sc->mii_phy_timo, 500);
208 0 : }
209 0 : return (EJUSTRETURN);
210 0 : }
211 :
212 : void
213 0 : mii_phy_auto_timeout(void *arg)
214 : {
215 0 : struct mii_softc *sc = arg;
216 : int s, bmsr;
217 :
218 0 : if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
219 0 : return;
220 :
221 0 : s = splnet();
222 0 : sc->mii_flags &= ~MIIF_DOINGAUTO;
223 0 : bmsr = PHY_READ(sc, MII_BMSR);
224 :
225 : /* Update the media status. */
226 0 : (void) PHY_SERVICE(sc, sc->mii_pdata, MII_POLLSTAT);
227 0 : splx(s);
228 0 : }
229 :
230 : int
231 0 : mii_phy_tick(struct mii_softc *sc)
232 : {
233 0 : struct mii_data *mii = sc->mii_pdata;
234 0 : struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
235 : int reg;
236 :
237 : /* Just bail now if the interface is down. */
238 0 : if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
239 0 : return (EJUSTRETURN);
240 :
241 : /*
242 : * If we're not doing autonegotiation, we don't need to do
243 : * any extra work here. However, we need to check the link
244 : * status so we can generate an announcement if the status
245 : * changes.
246 : */
247 0 : if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
248 0 : return (0);
249 :
250 : /* Read the status register twice; BMSR_LINK is latch-low. */
251 0 : reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
252 0 : if (reg & BMSR_LINK) {
253 : /*
254 : * See above.
255 : */
256 0 : return (0);
257 : }
258 :
259 : /*
260 : * Only retry autonegotiation every mii_anegticks seconds.
261 : */
262 0 : if (!sc->mii_anegticks)
263 0 : sc->mii_anegticks = MII_ANEGTICKS;
264 :
265 0 : if (++sc->mii_ticks <= sc->mii_anegticks)
266 0 : return (EJUSTRETURN);
267 :
268 0 : sc->mii_ticks = 0;
269 0 : PHY_RESET(sc);
270 :
271 0 : if (mii_phy_auto(sc, 0) == EJUSTRETURN)
272 0 : return (EJUSTRETURN);
273 :
274 : /*
275 : * Might need to generate a status message if autonegotiation
276 : * failed.
277 : */
278 0 : return (0);
279 0 : }
280 :
281 : void
282 0 : mii_phy_reset(struct mii_softc *sc)
283 : {
284 : int reg, i;
285 :
286 0 : if (sc->mii_flags & MIIF_NOISOLATE)
287 0 : reg = BMCR_RESET;
288 : else
289 : reg = BMCR_RESET | BMCR_ISO;
290 0 : PHY_WRITE(sc, MII_BMCR, reg);
291 :
292 : /*
293 : * It is best to allow a little time for the reset to settle
294 : * in before we start polling the BMCR again. Notably, the
295 : * DP83840A manual states that there should be a 500us delay
296 : * between asserting software reset and attempting MII serial
297 : * operations. Also, a DP83815 can get into a bad state on
298 : * cable removal and reinsertion if we do not delay here.
299 : */
300 0 : delay(500);
301 :
302 : /* Wait another 100ms for it to complete. */
303 0 : for (i = 0; i < 100; i++) {
304 0 : reg = PHY_READ(sc, MII_BMCR);
305 0 : if ((reg & BMCR_RESET) == 0)
306 : break;
307 0 : delay(1000);
308 : }
309 :
310 0 : if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
311 0 : PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
312 0 : }
313 :
314 : void
315 0 : mii_phy_down(struct mii_softc *sc)
316 : {
317 0 : if (sc->mii_flags & MIIF_DOINGAUTO) {
318 0 : sc->mii_flags &= ~MIIF_DOINGAUTO;
319 0 : timeout_del(&sc->mii_phy_timo);
320 0 : }
321 0 : }
322 :
323 :
324 : void
325 0 : mii_phy_status(struct mii_softc *sc)
326 : {
327 0 : PHY_STATUS(sc);
328 0 : }
329 :
330 : void
331 0 : mii_phy_update(struct mii_softc *sc, int cmd)
332 : {
333 0 : struct mii_data *mii = sc->mii_pdata;
334 0 : struct ifnet *ifp = mii->mii_ifp;
335 : int announce, s;
336 :
337 0 : if (sc->mii_media_active != mii->mii_media_active ||
338 0 : sc->mii_media_status != mii->mii_media_status ||
339 0 : cmd == MII_MEDIACHG) {
340 0 : announce = mii_phy_statusmsg(sc);
341 0 : (*mii->mii_statchg)(sc->mii_dev.dv_parent);
342 0 : sc->mii_media_active = mii->mii_media_active;
343 0 : sc->mii_media_status = mii->mii_media_status;
344 :
345 0 : if (announce) {
346 0 : s = splnet();
347 0 : if_link_state_change(ifp);
348 0 : splx(s);
349 0 : }
350 : }
351 0 : }
352 :
353 : int
354 0 : mii_phy_statusmsg(struct mii_softc *sc)
355 : {
356 0 : struct mii_data *mii = sc->mii_pdata;
357 0 : struct ifnet *ifp = mii->mii_ifp;
358 : u_int64_t baudrate;
359 : int link_state, announce = 0;
360 :
361 0 : if (mii->mii_media_status & IFM_AVALID) {
362 0 : if (mii->mii_media_status & IFM_ACTIVE) {
363 0 : if (mii->mii_media_active & IFM_FDX)
364 0 : link_state = LINK_STATE_FULL_DUPLEX;
365 : else
366 : link_state = LINK_STATE_HALF_DUPLEX;
367 : } else
368 : link_state = LINK_STATE_DOWN;
369 : } else
370 : link_state = LINK_STATE_UNKNOWN;
371 :
372 0 : baudrate = ifmedia_baudrate(mii->mii_media_active);
373 :
374 0 : if (link_state != ifp->if_link_state) {
375 0 : ifp->if_link_state = link_state;
376 : /*
377 : * XXX Right here we'd like to notify protocols
378 : * XXX that the link status has changed, so that
379 : * XXX e.g. Duplicate Address Detection can restart.
380 : */
381 : announce = 1;
382 0 : }
383 :
384 0 : if (baudrate != ifp->if_baudrate) {
385 0 : ifp->if_baudrate = baudrate;
386 : announce = 1;
387 0 : }
388 :
389 0 : return (announce);
390 : }
391 :
392 : /*
393 : * Initialize generic PHY media based on BMSR, called when a PHY is
394 : * attached.
395 : */
396 : void
397 0 : mii_phy_add_media(struct mii_softc *sc)
398 : {
399 0 : struct mii_data *mii = sc->mii_pdata;
400 :
401 : #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
402 :
403 0 : if ((sc->mii_flags & MIIF_NOISOLATE) == 0)
404 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
405 : MII_MEDIA_NONE);
406 :
407 0 : if (sc->mii_capabilities & BMSR_10THDX) {
408 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
409 : MII_MEDIA_10_T);
410 0 : }
411 0 : if (sc->mii_capabilities & BMSR_10TFDX) {
412 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
413 : MII_MEDIA_10_T_FDX);
414 0 : }
415 0 : if (sc->mii_capabilities & BMSR_100TXHDX) {
416 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
417 : MII_MEDIA_100_TX);
418 0 : }
419 0 : if (sc->mii_capabilities & BMSR_100TXFDX) {
420 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
421 : MII_MEDIA_100_TX_FDX);
422 0 : }
423 0 : if (sc->mii_capabilities & BMSR_100T4) {
424 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
425 : MII_MEDIA_100_T4);
426 0 : }
427 0 : if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) {
428 : /*
429 : * XXX Right now only handle 1000SX and 1000TX. Need
430 : * XXX to handle 1000LX and 1000CX some how.
431 : */
432 0 : if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
433 0 : sc->mii_anegticks = MII_ANEGTICKS_GIGE;
434 0 : sc->mii_flags |= MIIF_IS_1000X;
435 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0,
436 : sc->mii_inst), MII_MEDIA_1000_X);
437 0 : }
438 0 : if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
439 0 : sc->mii_anegticks = MII_ANEGTICKS_GIGE;
440 0 : sc->mii_flags |= MIIF_IS_1000X;
441 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX,
442 : sc->mii_inst), MII_MEDIA_1000_X_FDX);
443 0 : }
444 :
445 : /*
446 : * 1000baseT media needs to be able to manipulate
447 : * master/slave mode. We set IFM_ETH_MASTER in
448 : * the "don't care mask" and filter it out when
449 : * the media is set.
450 : *
451 : * All 1000baseT PHYs have a 1000baseT control register.
452 : */
453 0 : if (sc->mii_extcapabilities & EXTSR_1000THDX) {
454 0 : sc->mii_anegticks = MII_ANEGTICKS_GIGE;
455 0 : sc->mii_flags |= MIIF_HAVE_GTCR;
456 0 : mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
457 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0,
458 : sc->mii_inst), MII_MEDIA_1000_T);
459 0 : }
460 0 : if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
461 0 : sc->mii_anegticks = MII_ANEGTICKS_GIGE;
462 0 : sc->mii_flags |= MIIF_HAVE_GTCR;
463 0 : mii->mii_media.ifm_mask |= IFM_ETH_MASTER;
464 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX,
465 : sc->mii_inst), MII_MEDIA_1000_T_FDX);
466 0 : }
467 : }
468 :
469 0 : if (sc->mii_capabilities & BMSR_ANEG) {
470 0 : ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
471 : MII_NMEDIA); /* intentionally invalid index */
472 0 : }
473 : #undef ADD
474 0 : }
475 :
476 : void
477 0 : mii_phy_delete_media(struct mii_softc *sc)
478 : {
479 0 : struct mii_data *mii = sc->mii_pdata;
480 :
481 0 : ifmedia_delete_instance(&mii->mii_media, sc->mii_inst);
482 0 : }
483 :
484 : int
485 0 : mii_phy_detach(struct device *self, int flags)
486 : {
487 0 : struct mii_softc *sc = (void *) self;
488 :
489 0 : if (sc->mii_flags & MIIF_DOINGAUTO)
490 0 : timeout_del(&sc->mii_phy_timo);
491 :
492 0 : mii_phy_delete_media(sc);
493 :
494 0 : return (0);
495 : }
496 :
497 : const struct mii_phydesc *
498 0 : mii_phy_match(const struct mii_attach_args *ma, const struct mii_phydesc *mpd)
499 : {
500 :
501 0 : for (; mpd->mpd_name != NULL; mpd++) {
502 0 : if (MII_OUI(ma->mii_id1, ma->mii_id2) == mpd->mpd_oui &&
503 0 : MII_MODEL(ma->mii_id2) == mpd->mpd_model)
504 0 : return (mpd);
505 : }
506 0 : return (NULL);
507 0 : }
508 :
509 : /*
510 : * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
511 : */
512 : uint64_t
513 0 : mii_phy_flowstatus(struct mii_softc *sc)
514 : {
515 : int anar, anlpar;
516 :
517 0 : if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
518 0 : return (0);
519 :
520 0 : anar = PHY_READ(sc, MII_ANAR);
521 0 : anlpar = PHY_READ(sc, MII_ANLPAR);
522 :
523 : /* For 1000baseX, the bits are in a different location. */
524 0 : if (sc->mii_flags & MIIF_IS_1000X) {
525 0 : anar <<= 3;
526 0 : anlpar <<= 3;
527 0 : }
528 :
529 0 : if ((anar & ANAR_PAUSE_SYM) & (anlpar & ANLPAR_PAUSE_SYM))
530 0 : return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
531 :
532 0 : if ((anar & ANAR_PAUSE_SYM) == 0) {
533 0 : if ((anar & ANAR_PAUSE_ASYM) &&
534 0 : ((anlpar & ANLPAR_PAUSE_TOWARDS) == ANLPAR_PAUSE_TOWARDS))
535 0 : return (IFM_FLOW|IFM_ETH_TXPAUSE);
536 : else
537 0 : return (0);
538 : }
539 :
540 0 : if ((anar & ANAR_PAUSE_ASYM) == 0) {
541 0 : if (anlpar & ANLPAR_PAUSE_SYM)
542 0 : return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
543 : else
544 0 : return (0);
545 : }
546 :
547 0 : switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) {
548 : case ANLPAR_PAUSE_NONE:
549 0 : return (0);
550 :
551 : case ANLPAR_PAUSE_ASYM:
552 0 : return (IFM_FLOW|IFM_ETH_RXPAUSE);
553 :
554 : default:
555 0 : return (IFM_FLOW|IFM_ETH_RXPAUSE|IFM_ETH_TXPAUSE);
556 : }
557 : /* NOTREACHED */
558 0 : }
559 :
560 : /*
561 : * Given an ifmedia word, return the corresponding ANAR value.
562 : */
563 : int
564 0 : mii_anar(uint64_t media)
565 : {
566 : int rv;
567 :
568 0 : switch (media & (IFM_TMASK|IFM_NMASK|IFM_FDX)) {
569 : case IFM_ETHER|IFM_10_T:
570 : rv = ANAR_10|ANAR_CSMA;
571 0 : break;
572 : case IFM_ETHER|IFM_10_T|IFM_FDX:
573 : rv = ANAR_10_FD|ANAR_CSMA;
574 0 : break;
575 : case IFM_ETHER|IFM_100_TX:
576 : rv = ANAR_TX|ANAR_CSMA;
577 0 : break;
578 : case IFM_ETHER|IFM_100_TX|IFM_FDX:
579 : rv = ANAR_TX_FD|ANAR_CSMA;
580 0 : break;
581 : case IFM_ETHER|IFM_100_T4:
582 : rv = ANAR_T4|ANAR_CSMA;
583 0 : break;
584 : default:
585 : rv = 0;
586 0 : break;
587 : }
588 :
589 0 : return (rv);
590 : }
|
