LCOV - code coverage report

Current view: top level - dev/pci/drm/i915 - intel_display.c (source / functions) Hit Total Coverage Test: 6.4 Lines: 0 7550 0.0 % Date: 2018-10-19 03:25:38 Functions: 0 429 0.0 % Legend: Lines: hit not hit

Function Name	Hit count
__intel_framebuffer_create	0
__intel_pageflip_stall_check	0
adpa_pipe_enabled	0
assert_can_disable_lcpll	0
assert_cursor	0
assert_dsi_pll	0
assert_fdi_rx	0
assert_fdi_rx_pll	0
assert_fdi_tx	0
assert_fdi_tx_pll_enabled	0
assert_panel_unlocked	0
assert_pch_dp_disabled	0
assert_pch_hdmi_disabled	0
assert_pch_ports_disabled	0
assert_pch_transcoder_disabled	0
assert_pipe	0
assert_plane	0
assert_planes_disabled	0
assert_pll	0
assert_shared_dpll	0
assert_sprites_disabled	0
assert_vblank_disabled	0
broadwell_get_display_clock_speed	0
broadwell_modeset_calc_cdclk	0
broadwell_modeset_commit_cdclk	0
broadwell_set_cdclk	0
broxton_calc_cdclk	0
broxton_get_display_clock_speed	0
broxton_init_cdclk	0
broxton_modeset_calc_cdclk	0
broxton_modeset_commit_cdclk	0
broxton_set_cdclk	0
broxton_uninit_cdclk	0
bxt_find_best_dpll	0
bxt_get_ddi_pll	0
check_connector_state	0
check_crtc_state	0
check_digital_port_conflicts	0
check_encoder_cloning	0
check_encoder_state	0
check_shared_dpll_state	0
check_single_encoder_cloning	0
check_wm_state	0
cherryview_set_cdclk	0
chv_calc_dpll_params	0
chv_compute_dpll	0
chv_crtc_clock_get	0
chv_disable_pll	0
chv_enable_pll	0
chv_find_best_dpll	0
chv_prepare_pll	0
clear_intel_crtc_state	0
compute_baseline_pipe_bpp	0
compute_m_n	0
connected_sink_compute_bpp	0
cpt_set_fdi_bc_bifurcation	0
cpt_verify_modeset	0
cursor_size_ok	0
do_intel_finish_page_flip	0
dp_pipe_enabled	0
encoders_cloneable	0
g33_get_display_clock_speed	0
g4x_find_best_dpll	0
g4x_flip_count_after_eq	0
gen6_fdi_link_train	0
get_crtc_power_domains	0
gm45_get_display_clock_speed	0
has_edp_a	0
haswell_crtc_compute_clock	0
haswell_crtc_disable	0
haswell_crtc_enable	0
haswell_get_ddi_pll	0
haswell_get_ddi_port_state	0
haswell_get_display_clock_speed	0
haswell_get_pipe_config	0
haswell_mode_set_planes_workaround	0
haswell_set_pipeconf	0
hdmi_pipe_enabled	0
hsw_compute_ips_config	0
hsw_crtc_supports_ips	0
hsw_disable_ips	0
hsw_disable_lcpll	0
hsw_disable_pc8	0
hsw_enable_ips	0
hsw_enable_pc8	0
hsw_read_dcomp	0
hsw_restore_lcpll	0
hsw_write_dcomp	0
i830_get_display_clock_speed	0
i845_update_cursor	0
i85x_get_display_clock_speed	0
i865_get_display_clock_speed	0
i8xx_compute_dpll	0
i915_disable_vga	0
i915_get_display_clock_speed	0
i915_redisable_vga	0
i915_redisable_vga_power_on	0
i915gm_get_display_clock_speed	0
i945_get_display_clock_speed	0
i965gm_get_display_clock_speed	0
i9xx_calc_dpll_params	0
i9xx_compute_dpll	0
i9xx_crtc_clock_get	0
i9xx_crtc_compute_clock	0
i9xx_crtc_disable	0
i9xx_crtc_enable	0
i9xx_disable_pll	0
i9xx_dpll_compute_fp	0
i9xx_dpll_compute_m	0
i9xx_enable_pll	0
i9xx_find_best_dpll	0
i9xx_format_to_fourcc	0
i9xx_get_initial_plane_config	0
i9xx_get_pfit_config	0
i9xx_get_pipe_config	0
i9xx_get_refclk	0
i9xx_misc_get_display_clock_speed	0
i9xx_pfit_disable	0
i9xx_pfit_enable	0
i9xx_pll_refclk	0
i9xx_select_p2_div	0
i9xx_set_pipeconf	0
i9xx_set_pll_dividers	0
i9xx_update_cursor	0
i9xx_update_pll_dividers	0
i9xx_update_primary_plane	0
ibx_assert_pch_refclk_enabled	0
ibx_pch_dpll_disable	0
ibx_pch_dpll_enable	0
ibx_pch_dpll_get_hw_state	0
ibx_pch_dpll_init	0
ibx_pch_dpll_mode_set	0
ilk_do_mmio_flip	0
ilk_get_display_clock_speed	0
ilk_max_pixel_rate	0
intel_PLL_is_valid	0
intel_alloc_initial_plane_obj	0
intel_atomic_check	0
intel_atomic_commit	0
intel_begin_crtc_commit	0
intel_best_encoder	0
intel_check_cursor_plane	0
intel_check_page_flip	0
intel_check_plane_mapping	0
intel_check_primary_plane	0
intel_cleanup_plane_fb	0
intel_commit_cursor_plane	0
intel_commit_primary_plane	0
intel_compare_link_m_n	0
intel_compare_m_n	0
intel_complete_page_flips	0
intel_compute_max_dotclk	0
intel_connector_alloc	0
intel_connector_attach_encoder	0
intel_connector_check_state	0
intel_connector_get_hw_state	0
intel_connector_init	0
intel_connector_unregister	0
intel_cpu_transcoder_get_m_n	0
intel_cpu_transcoder_set_m_n	0
intel_create_rotation_property	0
intel_crt_present	0
intel_crtc_active	0
intel_crtc_atomic_check	0
intel_crtc_compute_config	0
intel_crtc_destroy	0
intel_crtc_disable_noatomic	0
intel_crtc_disable_planes	0
intel_crtc_dpms_overlay_disable	0
intel_crtc_gamma_set	0
intel_crtc_has_encoders	0
intel_crtc_has_pending_flip	0
intel_crtc_init	0
intel_crtc_load_lut	0
intel_crtc_mode_get	0
intel_crtc_page_flip	0
intel_crtc_restore_mode	0
intel_crtc_to_shared_dpll	0
intel_crtc_update_cursor	0
intel_crtc_wait_for_pending_flips	0
intel_cursor_plane_create	0
intel_default_queue_flip	0
intel_disable_cursor_plane	0
intel_disable_pipe	0
intel_disable_primary_plane	0
intel_disable_shared_dpll	0
intel_display_capture_error_state	0
intel_display_port_aux_power_domain	0
intel_display_port_power_domain	0
intel_display_print_error_state	0
intel_display_resume	0
intel_display_suspend	0
intel_do_mmio_flip	0
intel_dotclock_calculate	0
intel_dp_get_m_n	0
intel_dp_set_m_n	0
intel_dump_crtc_timings	0
intel_dump_pipe_config	0
intel_enable_pipe	0
intel_enable_pipe_a	0
intel_enable_shared_dpll	0
intel_encoder_clones	0
intel_encoder_destroy	0
intel_fb_align_height	0
intel_fb_pitch_limit	0
intel_fb_stride_alignment	0
intel_fdi_link_freq	0
intel_fdi_normal_train	0
intel_fill_fb_ggtt_view	0
intel_find_initial_plane_obj	0
intel_finish_crtc_commit	0
intel_finish_fb	0
intel_finish_page_flip	0
intel_finish_page_flip_plane	0
intel_finish_reset	0
intel_framebuffer_create	0
intel_framebuffer_create_for_mode	0
intel_framebuffer_init	0
intel_framebuffer_pitch_for_width	0
intel_framebuffer_size_for_mode	0
intel_fuzzy_clock_check	0
intel_g4x_limit	0
intel_gen2_queue_flip	0
intel_gen3_queue_flip	0
intel_gen4_compute_page_offset	0
intel_gen4_queue_flip	0
intel_gen6_queue_flip	0
intel_gen7_queue_flip	0
intel_get_load_detect_pipe	0
intel_get_pipe_from_connector	0
intel_get_pipe_from_crtc_id	0
intel_get_pipe_timings	0
intel_get_shared_dpll	0
intel_has_pending_fb_unpin	0
intel_hpll_vco	0
intel_hrawclk	0
intel_init_display	0
intel_init_pch_refclk	0
intel_init_quirks	0
intel_ironlake_limit	0
intel_limit	0
intel_linear_alignment	0
intel_link_compute_m_n	0
intel_mark_busy	0
intel_mark_idle	0
intel_mark_page_flip_active	0
intel_mmio_flip_work_func	0
intel_mode_from_pipe_config	0
intel_mode_max_pixclk	0
intel_modeset_all_pipes	0
intel_modeset_check_state	0
intel_modeset_checks	0
intel_modeset_cleanup	0
intel_modeset_clear_plls	0
intel_modeset_gem_init	0
intel_modeset_init	0
intel_modeset_init_hw	0
intel_modeset_pipe_config	0
intel_modeset_preclose	0
intel_modeset_readout_hw_state	0
intel_modeset_setup_hw_state	0
intel_modeset_setup_plane_state	0
intel_modeset_update_connector_atomic_state	0
intel_modeset_update_crtc_state	0
intel_modeset_vga_set_state	0
intel_num_dvo_pipes	0
intel_panel_use_ssc	0
intel_pch_rawclk	0
intel_pch_transcoder_get_m_n	0
intel_pch_transcoder_set_m_n	0
intel_pin_and_fence_fb_obj	0
intel_pipe_config_compare	0
intel_pipe_has_type	0
intel_pipe_set_base_atomic	0
intel_pipe_to_cpu_transcoder	0
intel_pipe_will_have_type	0
intel_plane_atomic_calc_changes	0
intel_plane_destroy	0
intel_plane_obj_offset	0
intel_post_enable_primary	0
intel_post_plane_update	0
intel_pre_disable_primary	0
intel_pre_plane_update	0
intel_prepare_page_flip	0
intel_prepare_plane_fb	0
intel_prepare_reset	0
intel_prepare_shared_dpll	0
intel_primary_plane_create	0
intel_queue_mmio_flip	0
intel_reduce_m_n_ratio	0
intel_release_load_detect_pipe	0
intel_sanitize_crtc	0
intel_sanitize_encoder	0
intel_set_pipe_csc	0
intel_set_pipe_timings	0
intel_setup_outputs	0
intel_shared_dpll_commit	0
intel_shared_dpll_init	0
intel_tile_height	0
intel_unpin_fb_obj	0
intel_unpin_work_fn	0
intel_update_cdclk	0
intel_update_czclk	0
intel_update_max_cdclk	0
intel_update_pipe_config	0
intel_update_primary_planes	0
intel_user_framebuffer_create	0
intel_user_framebuffer_create_handle	0
intel_user_framebuffer_destroy	0
intel_user_framebuffer_dirty	0
intel_wait_for_pipe_off	0
intel_wm_need_update	0
ironlake_check_encoder_dotclock	0
ironlake_check_fdi_lanes	0
ironlake_compute_clocks	0
ironlake_compute_dpll	0
ironlake_crtc_compute_clock	0
ironlake_crtc_disable	0
ironlake_crtc_enable	0
ironlake_disable_pch_transcoder	0
ironlake_enable_pch_transcoder	0
ironlake_fdi_compute_config	0
ironlake_fdi_disable	0
ironlake_fdi_link_train	0
ironlake_fdi_pll_disable	0
ironlake_fdi_pll_enable	0
ironlake_get_fdi_m_n_config	0
ironlake_get_initial_plane_config	0
ironlake_get_lanes_required	0
ironlake_get_pfit_config	0
ironlake_get_pipe_config	0
ironlake_get_refclk	0
ironlake_init_pch_refclk	0
ironlake_needs_fb_cb_tune	0
ironlake_pch_clock_get	0
ironlake_pch_enable	0
ironlake_pch_transcoder_set_timings	0
ironlake_pfit_disable	0
ironlake_pfit_enable	0
ironlake_set_pipeconf	0
ironlake_update_primary_plane	0
ivb_manual_fdi_link_train	0
ivybridge_update_fdi_bc_bifurcation	0
lpt_disable_clkout_dp	0
lpt_disable_pch_transcoder	0
lpt_enable_clkout_dp	0
lpt_enable_pch_transcoder	0
lpt_init_pch_refclk	0
lpt_pch_enable	0
lpt_program_fdi_mphy	0
lpt_program_iclkip	0
lpt_reset_fdi_mphy	0
lvds_pipe_enabled	0
mode_fits_in_fbdev	0
modeset_get_crtc_power_domains	0
modeset_put_power_domains	0
modeset_update_crtc_power_domains	0
need_vtd_wa	0
needs_modeset	0
page_flip_completed	0
page_flip_finished	0
pipe_config_supports_ips	0
pipe_dsl_stopped	0
pipe_required_fdi_lanes	0
pnv_calc_dpll_params	0
pnv_dpll_compute_fp	0
pnv_find_best_dpll	0
pnv_get_display_clock_speed	0
port_to_aux_power_domain	0
port_to_power_domain	0
primary_get_hw_state	0
quirk_backlight_present	0
quirk_invert_brightness	0
quirk_pipea_force	0
quirk_pipeb_force	0
quirk_ssc_force_disable	0
readout_plane_state	0
skl_cdclk_decimal	0
skl_cdclk_get_vco	0
skl_cdclk_pcu_ready	0
skl_cdclk_wait_for_pcu_ready	0
skl_detach_scaler	0
skl_detach_scalers	0
skl_do_mmio_flip	0
skl_dpll0_enable	0
skl_format_to_fourcc	0
skl_init_cdclk	0
skl_init_scalers	0
skl_max_scale	0
skl_plane_ctl_format	0
skl_plane_ctl_rotation	0
skl_plane_ctl_tiling	0
skl_set_cdclk	0
skl_uninit_cdclk	0
skl_update_scaler	0
skl_update_scaler_crtc	0
skl_update_scaler_plane	0
skylake_get_ddi_pll	0
skylake_get_display_clock_speed	0
skylake_get_initial_plane_config	0
skylake_get_pfit_config	0
skylake_pfit_enable	0
skylake_scaler_disable	0
skylake_update_primary_plane	0
state_string	0
update_scanline_offset	0
update_state_fb	0
use_mmio_flip	0
valleyview_calc_cdclk	0
valleyview_crtc_enable	0
valleyview_get_display_clock_speed	0
valleyview_get_vco	0
valleyview_modeset_calc_cdclk	0
valleyview_modeset_commit_cdclk	0
valleyview_set_cdclk	0
vlv_PLL_is_optimal	0
vlv_calc_dpll_params	0
vlv_compute_dpll	0
vlv_crtc_clock_get	0
vlv_disable_pll	0
vlv_enable_pll	0
vlv_find_best_dpll	0
vlv_force_pll_off	0
vlv_force_pll_on	0
vlv_get_cck_clock_hpll	0
vlv_pllb_recal_opamp	0
vlv_prepare_pll	0
vlv_program_pfi_credits	0
vlv_wait_port_ready	0

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