LCOV - code coverage report

Current view: top level - dev/pci/drm/i915 - intel_dp.c (source / functions) Hit Total Coverage Test: 6.4 Lines: 0 2910 0.0 % Date: 2018-10-19 03:25:38 Functions: 0 180 0.0 % Legend: Lines: hit not hit

Function Name	Hit count
_intel_dp_set_link_train	0
_intel_edp_backlight_off	0
_intel_edp_backlight_on	0
_pp_ctrl_reg	0
_pp_stat_reg	0
bxt_digital_port_connected	0
chv_data_lane_soft_reset	0
chv_dp_post_pll_disable	0
chv_dp_pre_pll_enable	0
chv_need_uniq_trans_scale	0
chv_post_disable_dp	0
chv_pre_enable_dp	0
chv_signal_levels	0
cpt_digital_port_connected	0
edp_detect	0
edp_have_panel_power	0
edp_have_panel_vdd	0
edp_notify_handler	0
edp_panel_off	0
edp_panel_on	0
edp_panel_vdd_off	0
edp_panel_vdd_off_sync	0
edp_panel_vdd_on	0
edp_panel_vdd_schedule_off	0
edp_panel_vdd_work	0
edp_wait_backlight_off	0
g4x_digital_port_connected	0
g4x_dp_detect	0
g4x_enable_dp	0
g4x_pre_enable_dp	0
gen4_signal_levels	0
gen6_edp_signal_levels	0
gen7_edp_signal_levels	0
gm45_digital_port_connected	0
hsw_dp_set_ddi_pll_sel	0
hsw_get_aux_clock_divider	0
i9xx_get_aux_clock_divider	0
i9xx_get_aux_send_ctl	0
ibx_digital_port_connected	0
ilk_get_aux_clock_divider	0
ilk_post_disable_dp	0
intel_attached_dp	0
intel_digital_port_connected	0
intel_disable_dp	0
intel_dp_add_properties	0
intel_dp_autotest_edid	0
intel_dp_autotest_link_training	0
intel_dp_autotest_phy_pattern	0
intel_dp_autotest_video_pattern	0
intel_dp_aux_ch	0
intel_dp_aux_init	0
intel_dp_aux_transfer	0
intel_dp_aux_wait_done	0
intel_dp_check_edp	0
intel_dp_check_link_status	0
intel_dp_check_mst_status	0
intel_dp_common_rates	0
intel_dp_compute_config	0
intel_dp_compute_rate	0
intel_dp_connector_destroy	0
intel_dp_connector_unregister	0
intel_dp_detect	0
intel_dp_detect_audio	0
intel_dp_detect_dpcd	0
intel_dp_dpcd_read_wake	0
intel_dp_drrs_init	0
intel_dp_enable_port	0
intel_dp_encoder_destroy	0
intel_dp_encoder_reset	0
intel_dp_encoder_suspend	0
intel_dp_force	0
intel_dp_get_config	0
intel_dp_get_dpcd	0
intel_dp_get_edid	0
intel_dp_get_hw_state	0
intel_dp_get_link_status	0
intel_dp_get_modes	0
intel_dp_get_sink_irq	0
intel_dp_get_sink_irq_esi	0
intel_dp_handle_test_request	0
intel_dp_hpd_pulse	0
intel_dp_init	0
intel_dp_init_connector	0
intel_dp_init_panel_power_sequencer	0
intel_dp_init_panel_power_sequencer_registers	0
intel_dp_init_panel_power_timestamps	0
intel_dp_is_edp	0
intel_dp_link_down	0
intel_dp_link_required	0
intel_dp_link_training_channel_equalization	0
intel_dp_link_training_clock_recovery	0
intel_dp_max_data_rate	0
intel_dp_max_lane_count	0
intel_dp_max_link_bw	0
intel_dp_max_link_rate	0
intel_dp_mode_valid	0
intel_dp_mst_resume	0
intel_dp_mst_suspend	0
intel_dp_pack_aux	0
intel_dp_pre_emphasis_max	0
intel_dp_prepare	0
intel_dp_print_rates	0
intel_dp_probe_mst	0
intel_dp_probe_oui	0
intel_dp_rate_select	0
intel_dp_reset_link_train	0
intel_dp_set_clock	0
intel_dp_set_drrs_state	0
intel_dp_set_edid	0
intel_dp_set_idle_link_train	0
intel_dp_set_link_params	0
intel_dp_set_link_train	0
intel_dp_set_property	0
intel_dp_set_signal_levels	0
intel_dp_sink_crc	0
intel_dp_sink_crc_start	0
intel_dp_sink_crc_stop	0
intel_dp_sink_dpms	0
intel_dp_sink_rates	0
intel_dp_source_rates	0
intel_dp_source_supports_hbr2	0
intel_dp_start_link_train	0
intel_dp_stop_link_train	0
intel_dp_to_dev	0
intel_dp_unpack_aux	0
intel_dp_unset_edid	0
intel_dp_unused_lane_mask	0
intel_dp_update_link_train	0
intel_dp_voltage_max	0
intel_edp_backlight_off	0
intel_edp_backlight_on	0
intel_edp_backlight_power	0
intel_edp_drrs_disable	0
intel_edp_drrs_downclock_work	0
intel_edp_drrs_enable	0
intel_edp_drrs_flush	0
intel_edp_drrs_invalidate	0
intel_edp_init_connector	0
intel_edp_panel_off	0
intel_edp_panel_on	0
intel_edp_panel_vdd_on	0
intel_edp_panel_vdd_sanitize	0
intel_enable_dp	0
intel_get_adjust_train	0
intel_trans_dp_port_sel	0
intersect_rates	0
ironlake_dp_detect	0
ironlake_edp_pll_off	0
ironlake_edp_pll_on	0
ironlake_get_pp_control	0
ironlake_set_pll_cpu_edp	0
is_edp	0
pps_lock	0
pps_unlock	0
rate_to_index	0
skl_edp_set_pll_config	0
skl_get_aux_clock_divider	0
skl_get_aux_send_ctl	0
vlv_detach_power_sequencer	0
vlv_dp_pre_pll_enable	0
vlv_enable_dp	0
vlv_get_aux_clock_divider	0
vlv_init_panel_power_sequencer	0
vlv_initial_power_sequencer_setup	0
vlv_initial_pps_pipe	0
vlv_pipe_any	0
vlv_pipe_has_pp_on	0
vlv_pipe_has_vdd_on	0
vlv_post_disable_dp	0
vlv_power_sequencer_kick	0
vlv_power_sequencer_pipe	0
vlv_power_sequencer_reset	0
vlv_pre_enable_dp	0
vlv_signal_levels	0
vlv_steal_power_sequencer	0
wait_backlight_on	0
wait_panel_off	0
wait_panel_on	0
wait_panel_power_cycle	0
wait_panel_status	0

Generated by: LCOV version 1.13