Line data Source code
1 : /*
2 : * Copyright © 2008 Intel Corporation
3 : * 2014 Red Hat Inc.
4 : *
5 : * Permission is hereby granted, free of charge, to any person obtaining a
6 : * copy of this software and associated documentation files (the "Software"),
7 : * to deal in the Software without restriction, including without limitation
8 : * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 : * and/or sell copies of the Software, and to permit persons to whom the
10 : * Software is furnished to do so, subject to the following conditions:
11 : *
12 : * The above copyright notice and this permission notice (including the next
13 : * paragraph) shall be included in all copies or substantial portions of the
14 : * Software.
15 : *
16 : * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 : * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 : * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 : * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 : * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 : * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 : * IN THE SOFTWARE.
23 : *
24 : */
25 :
26 : #include <dev/pci/drm/drmP.h>
27 : #include "i915_drv.h"
28 : #include "intel_drv.h"
29 : #include <dev/pci/drm/drm_atomic_helper.h>
30 : #include <dev/pci/drm/drm_crtc_helper.h>
31 : #include <dev/pci/drm/drm_edid.h>
32 :
33 0 : static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
34 : struct intel_crtc_state *pipe_config)
35 : {
36 0 : struct drm_device *dev = encoder->base.dev;
37 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
38 0 : struct intel_digital_port *intel_dig_port = intel_mst->primary;
39 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
40 : struct drm_atomic_state *state;
41 : int bpp, i;
42 : int lane_count, slots;
43 0 : const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
44 : struct drm_connector *drm_connector;
45 : struct intel_connector *connector, *found = NULL;
46 : struct drm_connector_state *connector_state;
47 : int mst_pbn;
48 :
49 0 : pipe_config->dp_encoder_is_mst = true;
50 0 : pipe_config->has_pch_encoder = false;
51 0 : pipe_config->has_dp_encoder = true;
52 : bpp = 24;
53 : /*
54 : * for MST we always configure max link bw - the spec doesn't
55 : * seem to suggest we should do otherwise.
56 : */
57 0 : lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
58 :
59 :
60 0 : pipe_config->lane_count = lane_count;
61 :
62 0 : pipe_config->pipe_bpp = 24;
63 0 : pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
64 :
65 0 : state = pipe_config->base.state;
66 :
67 0 : for_each_connector_in_state(state, drm_connector, connector_state, i) {
68 0 : connector = to_intel_connector(drm_connector);
69 :
70 0 : if (connector_state->best_encoder == &encoder->base) {
71 : found = connector;
72 0 : break;
73 : }
74 : }
75 :
76 0 : if (!found) {
77 0 : DRM_ERROR("can't find connector\n");
78 0 : return false;
79 : }
80 :
81 0 : mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
82 :
83 0 : pipe_config->pbn = mst_pbn;
84 0 : slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
85 :
86 0 : intel_link_compute_m_n(bpp, lane_count,
87 0 : adjusted_mode->crtc_clock,
88 0 : pipe_config->port_clock,
89 0 : &pipe_config->dp_m_n);
90 :
91 0 : pipe_config->dp_m_n.tu = slots;
92 :
93 0 : if (IS_HASWELL(dev) || IS_BROADWELL(dev))
94 0 : hsw_dp_set_ddi_pll_sel(pipe_config);
95 :
96 0 : return true;
97 :
98 0 : }
99 :
100 0 : static void intel_mst_disable_dp(struct intel_encoder *encoder)
101 : {
102 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
103 0 : struct intel_digital_port *intel_dig_port = intel_mst->primary;
104 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
105 : int ret;
106 :
107 : DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
108 :
109 0 : drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
110 :
111 0 : ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
112 0 : if (ret) {
113 0 : DRM_ERROR("failed to update payload %d\n", ret);
114 0 : }
115 0 : }
116 :
117 0 : static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
118 : {
119 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
120 0 : struct intel_digital_port *intel_dig_port = intel_mst->primary;
121 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
122 :
123 : DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
124 :
125 : /* this can fail */
126 0 : drm_dp_check_act_status(&intel_dp->mst_mgr);
127 : /* and this can also fail */
128 0 : drm_dp_update_payload_part2(&intel_dp->mst_mgr);
129 :
130 0 : drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
131 :
132 0 : intel_dp->active_mst_links--;
133 0 : intel_mst->port = NULL;
134 0 : if (intel_dp->active_mst_links == 0) {
135 0 : intel_dig_port->base.post_disable(&intel_dig_port->base);
136 0 : intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
137 0 : }
138 0 : }
139 :
140 0 : static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
141 : {
142 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
143 0 : struct intel_digital_port *intel_dig_port = intel_mst->primary;
144 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
145 0 : struct drm_device *dev = encoder->base.dev;
146 0 : struct drm_i915_private *dev_priv = dev->dev_private;
147 0 : enum port port = intel_dig_port->port;
148 : int ret;
149 : uint32_t temp;
150 : struct intel_connector *found = NULL, *connector;
151 0 : int slots;
152 0 : struct drm_crtc *crtc = encoder->base.crtc;
153 0 : struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
154 :
155 0 : for_each_intel_connector(dev, connector) {
156 0 : if (connector->base.state->best_encoder == &encoder->base) {
157 : found = connector;
158 0 : break;
159 : }
160 : }
161 :
162 0 : if (!found) {
163 0 : DRM_ERROR("can't find connector\n");
164 0 : return;
165 : }
166 :
167 : /* MST encoders are bound to a crtc, not to a connector,
168 : * force the mapping here for get_hw_state.
169 : */
170 0 : found->encoder = encoder;
171 :
172 : DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
173 0 : intel_mst->port = found->port;
174 :
175 0 : if (intel_dp->active_mst_links == 0) {
176 0 : enum port port = intel_ddi_get_encoder_port(encoder);
177 :
178 0 : intel_dp_set_link_params(intel_dp, intel_crtc->config);
179 :
180 : /* FIXME: add support for SKL */
181 0 : if (INTEL_INFO(dev)->gen < 9)
182 0 : I915_WRITE(PORT_CLK_SEL(port),
183 : intel_crtc->config->ddi_pll_sel);
184 :
185 0 : intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
186 :
187 0 : intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
188 :
189 :
190 0 : intel_dp_start_link_train(intel_dp);
191 0 : intel_dp_stop_link_train(intel_dp);
192 0 : }
193 :
194 0 : ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
195 0 : intel_mst->port,
196 0 : intel_crtc->config->pbn, &slots);
197 0 : if (ret == false) {
198 0 : DRM_ERROR("failed to allocate vcpi\n");
199 0 : return;
200 : }
201 :
202 :
203 0 : intel_dp->active_mst_links++;
204 0 : temp = I915_READ(DP_TP_STATUS(port));
205 0 : I915_WRITE(DP_TP_STATUS(port), temp);
206 :
207 0 : ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
208 0 : }
209 :
210 0 : static void intel_mst_enable_dp(struct intel_encoder *encoder)
211 : {
212 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
213 0 : struct intel_digital_port *intel_dig_port = intel_mst->primary;
214 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
215 0 : struct drm_device *dev = intel_dig_port->base.base.dev;
216 0 : struct drm_i915_private *dev_priv = dev->dev_private;
217 0 : enum port port = intel_dig_port->port;
218 : int ret;
219 :
220 : DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
221 :
222 0 : if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
223 : 1))
224 0 : DRM_ERROR("Timed out waiting for ACT sent\n");
225 :
226 0 : ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
227 :
228 0 : ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
229 0 : }
230 :
231 0 : static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
232 : enum pipe *pipe)
233 : {
234 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
235 0 : *pipe = intel_mst->pipe;
236 0 : if (intel_mst->port)
237 0 : return true;
238 0 : return false;
239 0 : }
240 :
241 0 : static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
242 : struct intel_crtc_state *pipe_config)
243 : {
244 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
245 0 : struct intel_digital_port *intel_dig_port = intel_mst->primary;
246 0 : struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
247 0 : struct drm_device *dev = encoder->base.dev;
248 0 : struct drm_i915_private *dev_priv = dev->dev_private;
249 0 : enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
250 : u32 temp, flags = 0;
251 :
252 0 : pipe_config->has_dp_encoder = true;
253 :
254 0 : temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
255 0 : if (temp & TRANS_DDI_PHSYNC)
256 0 : flags |= DRM_MODE_FLAG_PHSYNC;
257 : else
258 : flags |= DRM_MODE_FLAG_NHSYNC;
259 0 : if (temp & TRANS_DDI_PVSYNC)
260 0 : flags |= DRM_MODE_FLAG_PVSYNC;
261 : else
262 0 : flags |= DRM_MODE_FLAG_NVSYNC;
263 :
264 0 : switch (temp & TRANS_DDI_BPC_MASK) {
265 : case TRANS_DDI_BPC_6:
266 0 : pipe_config->pipe_bpp = 18;
267 0 : break;
268 : case TRANS_DDI_BPC_8:
269 0 : pipe_config->pipe_bpp = 24;
270 0 : break;
271 : case TRANS_DDI_BPC_10:
272 0 : pipe_config->pipe_bpp = 30;
273 0 : break;
274 : case TRANS_DDI_BPC_12:
275 0 : pipe_config->pipe_bpp = 36;
276 0 : break;
277 : default:
278 : break;
279 : }
280 0 : pipe_config->base.adjusted_mode.flags |= flags;
281 :
282 0 : pipe_config->lane_count =
283 0 : ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
284 :
285 0 : intel_dp_get_m_n(crtc, pipe_config);
286 :
287 0 : intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
288 0 : }
289 :
290 0 : static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
291 : {
292 0 : struct intel_connector *intel_connector = to_intel_connector(connector);
293 0 : struct intel_dp *intel_dp = intel_connector->mst_port;
294 : struct edid *edid;
295 : int ret;
296 :
297 0 : edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
298 0 : if (!edid)
299 0 : return 0;
300 :
301 0 : ret = intel_connector_update_modes(connector, edid);
302 0 : kfree(edid);
303 :
304 0 : return ret;
305 0 : }
306 :
307 : static enum drm_connector_status
308 0 : intel_dp_mst_detect(struct drm_connector *connector, bool force)
309 : {
310 0 : struct intel_connector *intel_connector = to_intel_connector(connector);
311 0 : struct intel_dp *intel_dp = intel_connector->mst_port;
312 :
313 0 : return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
314 : }
315 :
316 : static int
317 0 : intel_dp_mst_set_property(struct drm_connector *connector,
318 : struct drm_property *property,
319 : uint64_t val)
320 : {
321 0 : return 0;
322 : }
323 :
324 : static void
325 0 : intel_dp_mst_connector_destroy(struct drm_connector *connector)
326 : {
327 0 : struct intel_connector *intel_connector = to_intel_connector(connector);
328 :
329 0 : if (!IS_ERR_OR_NULL(intel_connector->edid))
330 0 : kfree(intel_connector->edid);
331 :
332 0 : drm_connector_cleanup(connector);
333 0 : kfree(connector);
334 0 : }
335 :
336 : static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
337 : .dpms = drm_atomic_helper_connector_dpms,
338 : .detect = intel_dp_mst_detect,
339 : .fill_modes = drm_helper_probe_single_connector_modes,
340 : .set_property = intel_dp_mst_set_property,
341 : .atomic_get_property = intel_connector_atomic_get_property,
342 : .destroy = intel_dp_mst_connector_destroy,
343 : .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
344 : .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
345 : };
346 :
347 0 : static int intel_dp_mst_get_modes(struct drm_connector *connector)
348 : {
349 0 : return intel_dp_mst_get_ddc_modes(connector);
350 : }
351 :
352 : static enum drm_mode_status
353 0 : intel_dp_mst_mode_valid(struct drm_connector *connector,
354 : struct drm_display_mode *mode)
355 : {
356 : /* TODO - validate mode against available PBN for link */
357 0 : if (mode->clock < 10000)
358 0 : return MODE_CLOCK_LOW;
359 :
360 0 : if (mode->flags & DRM_MODE_FLAG_DBLCLK)
361 0 : return MODE_H_ILLEGAL;
362 :
363 0 : return MODE_OK;
364 0 : }
365 :
366 0 : static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
367 : struct drm_connector_state *state)
368 : {
369 0 : struct intel_connector *intel_connector = to_intel_connector(connector);
370 0 : struct intel_dp *intel_dp = intel_connector->mst_port;
371 0 : struct intel_crtc *crtc = to_intel_crtc(state->crtc);
372 :
373 0 : return &intel_dp->mst_encoders[crtc->pipe]->base.base;
374 : }
375 :
376 0 : static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
377 : {
378 0 : struct intel_connector *intel_connector = to_intel_connector(connector);
379 0 : struct intel_dp *intel_dp = intel_connector->mst_port;
380 0 : return &intel_dp->mst_encoders[0]->base.base;
381 : }
382 :
383 : static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
384 : .get_modes = intel_dp_mst_get_modes,
385 : .mode_valid = intel_dp_mst_mode_valid,
386 : .atomic_best_encoder = intel_mst_atomic_best_encoder,
387 : .best_encoder = intel_mst_best_encoder,
388 : };
389 :
390 0 : static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
391 : {
392 0 : struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
393 :
394 0 : drm_encoder_cleanup(encoder);
395 0 : kfree(intel_mst);
396 0 : }
397 :
398 : static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
399 : .destroy = intel_dp_mst_encoder_destroy,
400 : };
401 :
402 0 : static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
403 : {
404 0 : if (connector->encoder && connector->base.state->crtc) {
405 0 : enum pipe pipe;
406 0 : if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
407 0 : return false;
408 0 : return true;
409 0 : }
410 0 : return false;
411 0 : }
412 :
413 0 : static void intel_connector_add_to_fbdev(struct intel_connector *connector)
414 : {
415 : #ifdef CONFIG_DRM_FBDEV_EMULATION
416 0 : struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
417 0 : drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
418 : #endif
419 0 : }
420 :
421 0 : static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
422 : {
423 : #ifdef CONFIG_DRM_FBDEV_EMULATION
424 0 : struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
425 0 : drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
426 : #endif
427 0 : }
428 :
429 0 : static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
430 : {
431 0 : struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
432 0 : struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
433 0 : struct drm_device *dev = intel_dig_port->base.base.dev;
434 : struct intel_connector *intel_connector;
435 : struct drm_connector *connector;
436 : int i;
437 :
438 0 : intel_connector = intel_connector_alloc();
439 0 : if (!intel_connector)
440 0 : return NULL;
441 :
442 0 : connector = &intel_connector->base;
443 0 : drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
444 0 : drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
445 :
446 0 : intel_connector->unregister = intel_connector_unregister;
447 0 : intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
448 0 : intel_connector->mst_port = intel_dp;
449 0 : intel_connector->port = port;
450 :
451 0 : for (i = PIPE_A; i <= PIPE_C; i++) {
452 0 : drm_mode_connector_attach_encoder(&intel_connector->base,
453 0 : &intel_dp->mst_encoders[i]->base.base);
454 : }
455 0 : intel_dp_add_properties(intel_dp, connector);
456 :
457 0 : drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
458 0 : drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
459 :
460 0 : drm_mode_connector_set_path_property(connector, pathprop);
461 0 : return connector;
462 0 : }
463 :
464 0 : static void intel_dp_register_mst_connector(struct drm_connector *connector)
465 : {
466 0 : struct intel_connector *intel_connector = to_intel_connector(connector);
467 0 : struct drm_device *dev = connector->dev;
468 0 : drm_modeset_lock_all(dev);
469 0 : intel_connector_add_to_fbdev(intel_connector);
470 0 : drm_modeset_unlock_all(dev);
471 0 : drm_connector_register(&intel_connector->base);
472 0 : }
473 :
474 0 : static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
475 : struct drm_connector *connector)
476 : {
477 0 : struct intel_connector *intel_connector = to_intel_connector(connector);
478 0 : struct drm_device *dev = connector->dev;
479 :
480 0 : intel_connector->unregister(intel_connector);
481 :
482 : /* need to nuke the connector */
483 0 : drm_modeset_lock_all(dev);
484 0 : if (connector->state->crtc) {
485 0 : struct drm_mode_set set;
486 : int ret;
487 :
488 0 : memset(&set, 0, sizeof(set));
489 0 : set.crtc = connector->state->crtc,
490 :
491 0 : ret = drm_atomic_helper_set_config(&set);
492 :
493 0 : WARN(ret, "Disabling mst crtc failed with %i\n", ret);
494 0 : }
495 :
496 0 : intel_connector_remove_from_fbdev(intel_connector);
497 0 : drm_connector_cleanup(connector);
498 0 : drm_modeset_unlock_all(dev);
499 :
500 0 : kfree(intel_connector);
501 : DRM_DEBUG_KMS("\n");
502 0 : }
503 :
504 0 : static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
505 : {
506 0 : struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
507 0 : struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
508 0 : struct drm_device *dev = intel_dig_port->base.base.dev;
509 :
510 0 : drm_kms_helper_hotplug_event(dev);
511 0 : }
512 :
513 : static struct drm_dp_mst_topology_cbs mst_cbs = {
514 : .add_connector = intel_dp_add_mst_connector,
515 : .register_connector = intel_dp_register_mst_connector,
516 : .destroy_connector = intel_dp_destroy_mst_connector,
517 : .hotplug = intel_dp_mst_hotplug,
518 : };
519 :
520 : static struct intel_dp_mst_encoder *
521 0 : intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
522 : {
523 : struct intel_dp_mst_encoder *intel_mst;
524 : struct intel_encoder *intel_encoder;
525 0 : struct drm_device *dev = intel_dig_port->base.base.dev;
526 :
527 0 : intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
528 :
529 0 : if (!intel_mst)
530 0 : return NULL;
531 :
532 0 : intel_mst->pipe = pipe;
533 0 : intel_encoder = &intel_mst->base;
534 0 : intel_mst->primary = intel_dig_port;
535 :
536 0 : drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
537 : DRM_MODE_ENCODER_DPMST);
538 :
539 0 : intel_encoder->type = INTEL_OUTPUT_DP_MST;
540 0 : intel_encoder->crtc_mask = 0x7;
541 0 : intel_encoder->cloneable = 0;
542 :
543 0 : intel_encoder->compute_config = intel_dp_mst_compute_config;
544 0 : intel_encoder->disable = intel_mst_disable_dp;
545 0 : intel_encoder->post_disable = intel_mst_post_disable_dp;
546 0 : intel_encoder->pre_enable = intel_mst_pre_enable_dp;
547 0 : intel_encoder->enable = intel_mst_enable_dp;
548 0 : intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
549 0 : intel_encoder->get_config = intel_dp_mst_enc_get_config;
550 :
551 0 : return intel_mst;
552 :
553 0 : }
554 :
555 : static bool
556 0 : intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
557 : {
558 : int i;
559 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
560 :
561 0 : for (i = PIPE_A; i <= PIPE_C; i++)
562 0 : intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
563 0 : return true;
564 : }
565 :
566 : int
567 0 : intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
568 : {
569 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
570 0 : struct drm_device *dev = intel_dig_port->base.base.dev;
571 : int ret;
572 :
573 0 : intel_dp->can_mst = true;
574 0 : intel_dp->mst_mgr.cbs = &mst_cbs;
575 :
576 : /* create encoders */
577 0 : intel_dp_create_fake_mst_encoders(intel_dig_port);
578 0 : ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
579 0 : if (ret) {
580 0 : intel_dp->can_mst = false;
581 0 : return ret;
582 : }
583 0 : return 0;
584 0 : }
585 :
586 : void
587 0 : intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
588 : {
589 0 : struct intel_dp *intel_dp = &intel_dig_port->dp;
590 :
591 0 : if (!intel_dp->can_mst)
592 0 : return;
593 :
594 0 : drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
595 : /* encoders will get killed by normal cleanup */
596 0 : }
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