Line data Source code
1 : /*
2 : * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 : * Copyright © 2006-2007 Intel Corporation
4 : *
5 : * Permission is hereby granted, free of charge, to any person obtaining a
6 : * copy of this software and associated documentation files (the "Software"),
7 : * to deal in the Software without restriction, including without limitation
8 : * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 : * and/or sell copies of the Software, and to permit persons to whom the
10 : * Software is furnished to do so, subject to the following conditions:
11 : *
12 : * The above copyright notice and this permission notice (including the next
13 : * paragraph) shall be included in all copies or substantial portions of the
14 : * Software.
15 : *
16 : * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 : * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 : * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 : * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 : * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 : * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 : * DEALINGS IN THE SOFTWARE.
23 : *
24 : * Authors:
25 : * Eric Anholt <eric@anholt.net>
26 : */
27 : #ifdef __linux__
28 : #include <linux/i2c.h>
29 : #include <linux/slab.h>
30 : #endif
31 : #include <dev/pci/drm/drmP.h>
32 : #include <dev/pci/drm/drm_atomic_helper.h>
33 : #include <dev/pci/drm/drm_crtc.h>
34 : #include "intel_drv.h"
35 : #include <dev/pci/drm/i915_drm.h>
36 : #include "i915_drv.h"
37 : #include "dvo.h"
38 :
39 : #define SIL164_ADDR 0x38
40 : #define CH7xxx_ADDR 0x76
41 : #define TFP410_ADDR 0x38
42 : #define NS2501_ADDR 0x38
43 :
44 : static const struct intel_dvo_device intel_dvo_devices[] = {
45 : {
46 : .type = INTEL_DVO_CHIP_TMDS,
47 : .name = "sil164",
48 : .dvo_reg = DVOC,
49 : .slave_addr = SIL164_ADDR,
50 : .dev_ops = &sil164_ops,
51 : },
52 : {
53 : .type = INTEL_DVO_CHIP_TMDS,
54 : .name = "ch7xxx",
55 : .dvo_reg = DVOC,
56 : .slave_addr = CH7xxx_ADDR,
57 : .dev_ops = &ch7xxx_ops,
58 : },
59 : {
60 : .type = INTEL_DVO_CHIP_TMDS,
61 : .name = "ch7xxx",
62 : .dvo_reg = DVOC,
63 : .slave_addr = 0x75, /* For some ch7010 */
64 : .dev_ops = &ch7xxx_ops,
65 : },
66 : {
67 : .type = INTEL_DVO_CHIP_LVDS,
68 : .name = "ivch",
69 : .dvo_reg = DVOA,
70 : .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
71 : .dev_ops = &ivch_ops,
72 : },
73 : {
74 : .type = INTEL_DVO_CHIP_TMDS,
75 : .name = "tfp410",
76 : .dvo_reg = DVOC,
77 : .slave_addr = TFP410_ADDR,
78 : .dev_ops = &tfp410_ops,
79 : },
80 : {
81 : .type = INTEL_DVO_CHIP_LVDS,
82 : .name = "ch7017",
83 : .dvo_reg = DVOC,
84 : .slave_addr = 0x75,
85 : .gpio = GMBUS_PIN_DPB,
86 : .dev_ops = &ch7017_ops,
87 : },
88 : {
89 : .type = INTEL_DVO_CHIP_TMDS,
90 : .name = "ns2501",
91 : .dvo_reg = DVOB,
92 : .slave_addr = NS2501_ADDR,
93 : .dev_ops = &ns2501_ops,
94 : }
95 : };
96 :
97 : struct intel_dvo {
98 : struct intel_encoder base;
99 :
100 : struct intel_dvo_device dev;
101 :
102 : struct intel_connector *attached_connector;
103 :
104 : bool panel_wants_dither;
105 : };
106 :
107 0 : static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
108 : {
109 0 : return container_of(encoder, struct intel_dvo, base);
110 : }
111 :
112 0 : static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
113 : {
114 0 : return enc_to_dvo(intel_attached_encoder(connector));
115 : }
116 :
117 0 : static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
118 : {
119 0 : struct drm_device *dev = connector->base.dev;
120 0 : struct drm_i915_private *dev_priv = dev->dev_private;
121 0 : struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
122 : u32 tmp;
123 :
124 0 : tmp = I915_READ(intel_dvo->dev.dvo_reg);
125 :
126 0 : if (!(tmp & DVO_ENABLE))
127 0 : return false;
128 :
129 0 : return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
130 0 : }
131 :
132 0 : static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
133 : enum pipe *pipe)
134 : {
135 0 : struct drm_device *dev = encoder->base.dev;
136 0 : struct drm_i915_private *dev_priv = dev->dev_private;
137 0 : struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
138 : u32 tmp;
139 :
140 0 : tmp = I915_READ(intel_dvo->dev.dvo_reg);
141 :
142 0 : if (!(tmp & DVO_ENABLE))
143 0 : return false;
144 :
145 0 : *pipe = PORT_TO_PIPE(tmp);
146 :
147 0 : return true;
148 0 : }
149 :
150 0 : static void intel_dvo_get_config(struct intel_encoder *encoder,
151 : struct intel_crtc_state *pipe_config)
152 : {
153 0 : struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
154 0 : struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
155 : u32 tmp, flags = 0;
156 :
157 0 : tmp = I915_READ(intel_dvo->dev.dvo_reg);
158 0 : if (tmp & DVO_HSYNC_ACTIVE_HIGH)
159 0 : flags |= DRM_MODE_FLAG_PHSYNC;
160 : else
161 : flags |= DRM_MODE_FLAG_NHSYNC;
162 0 : if (tmp & DVO_VSYNC_ACTIVE_HIGH)
163 0 : flags |= DRM_MODE_FLAG_PVSYNC;
164 : else
165 0 : flags |= DRM_MODE_FLAG_NVSYNC;
166 :
167 0 : pipe_config->base.adjusted_mode.flags |= flags;
168 :
169 0 : pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
170 0 : }
171 :
172 0 : static void intel_disable_dvo(struct intel_encoder *encoder)
173 : {
174 0 : struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
175 0 : struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
176 0 : u32 dvo_reg = intel_dvo->dev.dvo_reg;
177 0 : u32 temp = I915_READ(dvo_reg);
178 :
179 0 : intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
180 0 : I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
181 0 : I915_READ(dvo_reg);
182 0 : }
183 :
184 0 : static void intel_enable_dvo(struct intel_encoder *encoder)
185 : {
186 0 : struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
187 0 : struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
188 0 : struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
189 0 : u32 dvo_reg = intel_dvo->dev.dvo_reg;
190 0 : u32 temp = I915_READ(dvo_reg);
191 :
192 0 : intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
193 0 : &crtc->config->base.mode,
194 0 : &crtc->config->base.adjusted_mode);
195 :
196 0 : I915_WRITE(dvo_reg, temp | DVO_ENABLE);
197 0 : I915_READ(dvo_reg);
198 :
199 0 : intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
200 0 : }
201 :
202 : static enum drm_mode_status
203 0 : intel_dvo_mode_valid(struct drm_connector *connector,
204 : struct drm_display_mode *mode)
205 : {
206 0 : struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
207 : const struct drm_display_mode *fixed_mode =
208 0 : to_intel_connector(connector)->panel.fixed_mode;
209 0 : int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
210 0 : int target_clock = mode->clock;
211 :
212 0 : if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
213 0 : return MODE_NO_DBLESCAN;
214 :
215 : /* XXX: Validate clock range */
216 :
217 0 : if (fixed_mode) {
218 0 : if (mode->hdisplay > fixed_mode->hdisplay)
219 0 : return MODE_PANEL;
220 0 : if (mode->vdisplay > fixed_mode->vdisplay)
221 0 : return MODE_PANEL;
222 :
223 0 : target_clock = fixed_mode->clock;
224 0 : }
225 :
226 0 : if (target_clock > max_dotclk)
227 0 : return MODE_CLOCK_HIGH;
228 :
229 0 : return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
230 0 : }
231 :
232 0 : static bool intel_dvo_compute_config(struct intel_encoder *encoder,
233 : struct intel_crtc_state *pipe_config)
234 : {
235 0 : struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
236 : const struct drm_display_mode *fixed_mode =
237 0 : intel_dvo->attached_connector->panel.fixed_mode;
238 0 : struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
239 :
240 : /* If we have timings from the BIOS for the panel, put them in
241 : * to the adjusted mode. The CRTC will be set up for this mode,
242 : * with the panel scaling set up to source from the H/VDisplay
243 : * of the original mode.
244 : */
245 0 : if (fixed_mode)
246 0 : intel_fixed_panel_mode(fixed_mode, adjusted_mode);
247 :
248 0 : return true;
249 : }
250 :
251 0 : static void intel_dvo_pre_enable(struct intel_encoder *encoder)
252 : {
253 0 : struct drm_device *dev = encoder->base.dev;
254 0 : struct drm_i915_private *dev_priv = dev->dev_private;
255 0 : struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
256 0 : const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
257 0 : struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
258 0 : int pipe = crtc->pipe;
259 : u32 dvo_val;
260 0 : u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
261 :
262 0 : switch (dvo_reg) {
263 : case DVOA:
264 : default:
265 : dvo_srcdim_reg = DVOA_SRCDIM;
266 0 : break;
267 : case DVOB:
268 : dvo_srcdim_reg = DVOB_SRCDIM;
269 0 : break;
270 : case DVOC:
271 : dvo_srcdim_reg = DVOC_SRCDIM;
272 0 : break;
273 : }
274 :
275 : /* Save the data order, since I don't know what it should be set to. */
276 0 : dvo_val = I915_READ(dvo_reg) &
277 : (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
278 0 : dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
279 : DVO_BLANK_ACTIVE_HIGH;
280 :
281 0 : if (pipe == 1)
282 0 : dvo_val |= DVO_PIPE_B_SELECT;
283 0 : dvo_val |= DVO_PIPE_STALL;
284 0 : if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
285 0 : dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
286 0 : if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
287 0 : dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
288 :
289 : /*I915_WRITE(DVOB_SRCDIM,
290 : (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
291 : (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
292 0 : I915_WRITE(dvo_srcdim_reg,
293 : (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
294 : (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
295 : /*I915_WRITE(DVOB, dvo_val);*/
296 0 : I915_WRITE(dvo_reg, dvo_val);
297 0 : }
298 :
299 : /**
300 : * Detect the output connection on our DVO device.
301 : *
302 : * Unimplemented.
303 : */
304 : static enum drm_connector_status
305 0 : intel_dvo_detect(struct drm_connector *connector, bool force)
306 : {
307 0 : struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
308 : DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
309 : connector->base.id, connector->name);
310 0 : return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
311 : }
312 :
313 0 : static int intel_dvo_get_modes(struct drm_connector *connector)
314 : {
315 0 : struct drm_i915_private *dev_priv = connector->dev->dev_private;
316 : const struct drm_display_mode *fixed_mode =
317 0 : to_intel_connector(connector)->panel.fixed_mode;
318 :
319 : /* We should probably have an i2c driver get_modes function for those
320 : * devices which will have a fixed set of modes determined by the chip
321 : * (TV-out, for example), but for now with just TMDS and LVDS,
322 : * that's not the case.
323 : */
324 0 : intel_ddc_get_modes(connector,
325 0 : intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
326 0 : if (!list_empty(&connector->probed_modes))
327 0 : return 1;
328 :
329 0 : if (fixed_mode) {
330 : struct drm_display_mode *mode;
331 0 : mode = drm_mode_duplicate(connector->dev, fixed_mode);
332 0 : if (mode) {
333 0 : drm_mode_probed_add(connector, mode);
334 0 : return 1;
335 : }
336 0 : }
337 :
338 0 : return 0;
339 0 : }
340 :
341 0 : static void intel_dvo_destroy(struct drm_connector *connector)
342 : {
343 0 : drm_connector_cleanup(connector);
344 0 : intel_panel_fini(&to_intel_connector(connector)->panel);
345 0 : kfree(connector);
346 0 : }
347 :
348 : static const struct drm_connector_funcs intel_dvo_connector_funcs = {
349 : .dpms = drm_atomic_helper_connector_dpms,
350 : .detect = intel_dvo_detect,
351 : .destroy = intel_dvo_destroy,
352 : .fill_modes = drm_helper_probe_single_connector_modes,
353 : .atomic_get_property = intel_connector_atomic_get_property,
354 : .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
355 : .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
356 : };
357 :
358 : static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
359 : .mode_valid = intel_dvo_mode_valid,
360 : .get_modes = intel_dvo_get_modes,
361 : .best_encoder = intel_best_encoder,
362 : };
363 :
364 0 : static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
365 : {
366 0 : struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
367 :
368 0 : if (intel_dvo->dev.dev_ops->destroy)
369 0 : intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
370 :
371 0 : intel_encoder_destroy(encoder);
372 0 : }
373 :
374 : static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
375 : .destroy = intel_dvo_enc_destroy,
376 : };
377 :
378 : /**
379 : * Attempts to get a fixed panel timing for LVDS (currently only the i830).
380 : *
381 : * Other chips with DVO LVDS will need to extend this to deal with the LVDS
382 : * chip being on DVOB/C and having multiple pipes.
383 : */
384 : static struct drm_display_mode *
385 0 : intel_dvo_get_current_mode(struct drm_connector *connector)
386 : {
387 0 : struct drm_device *dev = connector->dev;
388 0 : struct drm_i915_private *dev_priv = dev->dev_private;
389 0 : struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
390 0 : uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
391 : struct drm_display_mode *mode = NULL;
392 :
393 : /* If the DVO port is active, that'll be the LVDS, so we can pull out
394 : * its timings to get how the BIOS set up the panel.
395 : */
396 0 : if (dvo_val & DVO_ENABLE) {
397 : struct drm_crtc *crtc;
398 0 : int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
399 :
400 0 : crtc = intel_get_crtc_for_pipe(dev, pipe);
401 0 : if (crtc) {
402 0 : mode = intel_crtc_mode_get(dev, crtc);
403 0 : if (mode) {
404 0 : mode->type |= DRM_MODE_TYPE_PREFERRED;
405 0 : if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
406 0 : mode->flags |= DRM_MODE_FLAG_PHSYNC;
407 0 : if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
408 0 : mode->flags |= DRM_MODE_FLAG_PVSYNC;
409 : }
410 : }
411 0 : }
412 :
413 0 : return mode;
414 : }
415 :
416 0 : void intel_dvo_init(struct drm_device *dev)
417 : {
418 0 : struct drm_i915_private *dev_priv = dev->dev_private;
419 : struct intel_encoder *intel_encoder;
420 : struct intel_dvo *intel_dvo;
421 : struct intel_connector *intel_connector;
422 : int i;
423 : int encoder_type = DRM_MODE_ENCODER_NONE;
424 :
425 0 : intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
426 0 : if (!intel_dvo)
427 0 : return;
428 :
429 0 : intel_connector = intel_connector_alloc();
430 0 : if (!intel_connector) {
431 0 : kfree(intel_dvo);
432 0 : return;
433 : }
434 :
435 0 : intel_dvo->attached_connector = intel_connector;
436 :
437 0 : intel_encoder = &intel_dvo->base;
438 0 : drm_encoder_init(dev, &intel_encoder->base,
439 : &intel_dvo_enc_funcs, encoder_type);
440 :
441 0 : intel_encoder->disable = intel_disable_dvo;
442 0 : intel_encoder->enable = intel_enable_dvo;
443 0 : intel_encoder->get_hw_state = intel_dvo_get_hw_state;
444 0 : intel_encoder->get_config = intel_dvo_get_config;
445 0 : intel_encoder->compute_config = intel_dvo_compute_config;
446 0 : intel_encoder->pre_enable = intel_dvo_pre_enable;
447 0 : intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
448 0 : intel_connector->unregister = intel_connector_unregister;
449 :
450 : /* Now, try to find a controller */
451 0 : for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
452 0 : struct drm_connector *connector = &intel_connector->base;
453 0 : const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
454 : struct i2c_adapter *i2c;
455 : int gpio;
456 : bool dvoinit;
457 : enum pipe pipe;
458 0 : uint32_t dpll[I915_MAX_PIPES];
459 :
460 : /* Allow the I2C driver info to specify the GPIO to be used in
461 : * special cases, but otherwise default to what's defined
462 : * in the spec.
463 : */
464 0 : if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
465 0 : gpio = dvo->gpio;
466 0 : else if (dvo->type == INTEL_DVO_CHIP_LVDS)
467 0 : gpio = GMBUS_PIN_SSC;
468 : else
469 : gpio = GMBUS_PIN_DPB;
470 :
471 : /* Set up the I2C bus necessary for the chip we're probing.
472 : * It appears that everything is on GPIOE except for panels
473 : * on i830 laptops, which are on GPIOB (DVOA).
474 : */
475 0 : i2c = intel_gmbus_get_adapter(dev_priv, gpio);
476 :
477 0 : intel_dvo->dev = *dvo;
478 :
479 : /* GMBUS NAK handling seems to be unstable, hence let the
480 : * transmitter detection run in bit banging mode for now.
481 : */
482 0 : intel_gmbus_force_bit(i2c, true);
483 :
484 : /* ns2501 requires the DVO 2x clock before it will
485 : * respond to i2c accesses, so make sure we have
486 : * have the clock enabled before we attempt to
487 : * initialize the device.
488 : */
489 0 : for_each_pipe(dev_priv, pipe) {
490 0 : dpll[pipe] = I915_READ(DPLL(pipe));
491 0 : I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
492 : }
493 :
494 0 : dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
495 :
496 : /* restore the DVO 2x clock state to original */
497 0 : for_each_pipe(dev_priv, pipe) {
498 0 : I915_WRITE(DPLL(pipe), dpll[pipe]);
499 : }
500 :
501 0 : intel_gmbus_force_bit(i2c, false);
502 :
503 0 : if (!dvoinit)
504 0 : continue;
505 :
506 0 : intel_encoder->type = INTEL_OUTPUT_DVO;
507 0 : intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
508 0 : switch (dvo->type) {
509 : case INTEL_DVO_CHIP_TMDS:
510 0 : intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
511 : (1 << INTEL_OUTPUT_DVO);
512 0 : drm_connector_init(dev, connector,
513 : &intel_dvo_connector_funcs,
514 : DRM_MODE_CONNECTOR_DVII);
515 : encoder_type = DRM_MODE_ENCODER_TMDS;
516 0 : break;
517 : case INTEL_DVO_CHIP_LVDS:
518 0 : intel_encoder->cloneable = 0;
519 0 : drm_connector_init(dev, connector,
520 : &intel_dvo_connector_funcs,
521 : DRM_MODE_CONNECTOR_LVDS);
522 : encoder_type = DRM_MODE_ENCODER_LVDS;
523 0 : break;
524 : }
525 :
526 0 : drm_connector_helper_add(connector,
527 : &intel_dvo_connector_helper_funcs);
528 0 : connector->display_info.subpixel_order = SubPixelHorizontalRGB;
529 0 : connector->interlace_allowed = false;
530 0 : connector->doublescan_allowed = false;
531 :
532 0 : intel_connector_attach_encoder(intel_connector, intel_encoder);
533 0 : if (dvo->type == INTEL_DVO_CHIP_LVDS) {
534 : /* For our LVDS chipsets, we should hopefully be able
535 : * to dig the fixed panel mode out of the BIOS data.
536 : * However, it's in a different format from the BIOS
537 : * data on chipsets with integrated LVDS (stored in AIM
538 : * headers, likely), so for now, just get the current
539 : * mode being output through DVO.
540 : */
541 0 : intel_panel_init(&intel_connector->panel,
542 0 : intel_dvo_get_current_mode(connector),
543 : NULL);
544 0 : intel_dvo->panel_wants_dither = true;
545 0 : }
546 :
547 0 : drm_connector_register(connector);
548 0 : return;
549 0 : }
550 :
551 0 : drm_encoder_cleanup(&intel_encoder->base);
552 0 : kfree(intel_dvo);
553 0 : kfree(intel_connector);
554 0 : }
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