LCOV - code coverage report

Current view: top level - dev/pci/drm/i915 - intel_pm.c (source / functions) Hit Total Coverage Test: 6.4 Lines: 0 3329 0.0 % Date: 2018-10-19 03:25:38 Functions: 0 213 0.0 % Legend: Lines: hit not hit

Function Name	Hit count
__gen6_update_ring_freq	0
__i915_chipset_val	0
__i915_gfx_val	0
__i915_update_gfx_val	0
__intel_rps_boost_work	0
_ilk_disable_lp_wm	0
_pxvid_to_vd	0
broadwater_init_clock_gating	0
broadwell_init_clock_gating	0
bxt_init_clock_gating	0
byt_freq_opcode	0
byt_gpu_freq	0
cherryview_check_pctx	0
cherryview_disable_rps	0
cherryview_enable_rps	0
cherryview_init_clock_gating	0
cherryview_init_gt_powersave	0
cherryview_rps_guar_freq	0
cherryview_rps_max_freq	0
cherryview_rps_rpe_freq	0
cherryview_setup_pctx	0
chv_freq_opcode	0
chv_gpu_freq	0
chv_set_memory_dvfs	0
chv_set_memory_pm5	0
cpt_init_clock_gating	0
crestline_init_clock_gating	0
g4x_check_srwm	0
g4x_compute_srwm	0
g4x_compute_wm0	0
g4x_disable_trickle_feed	0
g4x_init_clock_gating	0
g4x_update_wm	0
gen3_init_clock_gating	0
gen6_check_mch_setup	0
gen6_disable_rps	0
gen6_enable_rps	0
gen6_init_clock_gating	0
gen6_init_rps_frequencies	0
gen6_rps_boost	0
gen6_rps_busy	0
gen6_rps_idle	0
gen6_rps_pm_mask	0
gen6_set_rps	0
gen6_set_rps_thresholds	0
gen6_suspend_rps	0
gen6_update_ring_freq	0
gen7_setup_fixed_func_scheduler	0
gen8_enable_rps	0
gen9_disable_rps	0
gen9_enable_rc6	0
gen9_enable_rps	0
haswell_init_clock_gating	0
hsw_compute_linetime_wm	0
i830_get_fifo_size	0
i830_init_clock_gating	0
i845_get_fifo_size	0
i845_update_wm	0
i85x_init_clock_gating	0
i915_chipset_val	0
i915_gfx_val	0
i915_ironlake_get_mem_freq	0
i915_mch_val	0
i915_pineview_get_mem_freq	0
i915_update_gfx_val	0
i965_update_wm	0
i9xx_get_fifo_size	0
i9xx_update_wm	0
ibx_init_clock_gating	0
ilk_compute_cur_wm	0
ilk_compute_fbc_wm	0
ilk_compute_pri_wm	0
ilk_compute_spr_wm	0
ilk_compute_wm_config	0
ilk_compute_wm_dirty	0
ilk_compute_wm_level	0
ilk_compute_wm_maximums	0
ilk_compute_wm_reg_maximums	0
ilk_compute_wm_results	0
ilk_cursor_wm_max	0
ilk_cursor_wm_reg_max	0
ilk_disable_lp_wm	0
ilk_display_fifo_size	0
ilk_fbc_wm_reg_max	0
ilk_find_best_result	0
ilk_increase_wm_latency	0
ilk_init_lp_watermarks	0
ilk_merge_wm_level	0
ilk_pipe_pixel_rate	0
ilk_pipe_wm_get_hw_state	0
ilk_plane_wm_max	0
ilk_plane_wm_reg_max	0
ilk_setup_wm_latency	0
ilk_update_sprite_wm	0
ilk_update_wm	0
ilk_validate_wm_level	0
ilk_wm_fbc	0
ilk_wm_get_hw_state	0
ilk_wm_lp_latency	0
ilk_wm_lp_to_level	0
ilk_wm_max_level	0
ilk_wm_merge	0
ilk_wm_method1	0
ilk_wm_method2	0
ilk_write_wm_values	0
intel_calculate_wm	0
intel_cleanup_gt_powersave	0
intel_compute_pipe_wm	0
intel_disable_gt_powersave	0
intel_enable_gt_powersave	0
intel_enable_rc6	0
intel_fixup_cur_wm_latency	0
intel_fixup_spr_wm_latency	0
intel_freq_opcode	0
intel_gen6_powersave_work	0
intel_get_cxsr_latency	0
intel_gpu_freq	0
intel_gpu_ips_init	0
intel_gpu_ips_teardown	0
intel_init_clock_gating	0
intel_init_emon	0
intel_init_gt_powersave	0
intel_init_pm	0
intel_pm_setup	0
intel_print_rc6_info	0
intel_print_wm_latency	0
intel_pxfreq	0
intel_queue_rps_boost_for_request	0
intel_read_wm_latency	0
intel_reset_gt_powersave	0
intel_rps_limits	0
intel_set_memory_cxsr	0
intel_set_rps	0
intel_suspend_gt_powersave	0
intel_suspend_hw	0
intel_update_sprite_watermarks	0
intel_update_watermarks	0
ironlake_disable_drps	0
ironlake_enable_drps	0
ironlake_init_clock_gating	0
ironlake_set_drps	0
ivybridge_init_clock_gating	0
lpt_init_clock_gating	0
lpt_suspend_hw	0
pineview_update_wm	0
pvid_to_extvid	0
sandybridge_pcode_read	0
sandybridge_pcode_write	0
sanitize_rc6_option	0
single_enabled_crtc	0
skl_allocate_pipe_ddb	0
skl_clear_wm	0
skl_compute_linetime_wm	0
skl_compute_pipe_wm	0
skl_compute_plane_wm	0
skl_compute_transition_wm	0
skl_compute_wm_global_parameters	0
skl_compute_wm_level	0
skl_compute_wm_pipe_parameters	0
skl_compute_wm_results	0
skl_cursor_allocation	0
skl_ddb_allocation_changed	0
skl_ddb_allocation_included	0
skl_ddb_entry_init_from_hw	0
skl_ddb_entry_write	0
skl_ddb_get_hw_state	0
skl_ddb_get_pipe_allocation_limits	0
skl_flush_wm_values	0
skl_get_total_relative_data_rate	0
skl_pipe_pixel_rate	0
skl_pipe_wm_active_state	0
skl_pipe_wm_get_hw_state	0
skl_plane_relative_data_rate	0
skl_setup_wm_latency	0
skl_update_other_pipe_wm	0
skl_update_pipe_wm	0
skl_update_sprite_wm	0
skl_update_wm	0
skl_wm_flush_pipe	0
skl_wm_get_hw_state	0
skl_wm_method1	0
skl_wm_method2	0
skl_write_wm_values	0
snb_wm_latency_quirk	0
valleyview_check_pctx	0
valleyview_cleanup_gt_powersave	0
valleyview_cleanup_pctx	0
valleyview_disable_rps	0
valleyview_enable_rps	0
valleyview_init_clock_gating	0
valleyview_init_gt_powersave	0
valleyview_rps_guar_freq	0
valleyview_rps_max_freq	0
valleyview_rps_min_freq	0
valleyview_rps_rpe_freq	0
valleyview_set_rps	0
valleyview_setup_pctx	0
vlv_compute_fifo	0
vlv_compute_wm	0
vlv_compute_wm_level	0
vlv_get_fifo_size	0
vlv_gpu_freq_div	0
vlv_init_display_clock_gating	0
vlv_invert_wms	0
vlv_merge_wm	0
vlv_pipe_set_fifo_size	0
vlv_read_wm_values	0
vlv_set_rps_idle	0
vlv_setup_wm_latency	0
vlv_update_wm	0
vlv_wm_get_hw_state	0
vlv_wm_method2	0
vlv_write_wm_values	0

Generated by: LCOV version 1.13