Line data Source code
1 : /*
2 : * Copyright 2014 Advanced Micro Devices, Inc.
3 : *
4 : * Permission is hereby granted, free of charge, to any person obtaining a
5 : * copy of this software and associated documentation files (the "Software"),
6 : * to deal in the Software without restriction, including without limitation
7 : * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 : * and/or sell copies of the Software, and to permit persons to whom the
9 : * Software is furnished to do so, subject to the following conditions:
10 : *
11 : * The above copyright notice and this permission notice shall be included in
12 : * all copies or substantial portions of the Software.
13 : *
14 : * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 : * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 : * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 : * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 : * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 : * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 : * OTHER DEALINGS IN THE SOFTWARE.
21 : *
22 : * Authors: Slava Grigorev <slava.grigorev@amd.com>
23 : */
24 :
25 : #include <dev/pci/drm/drmP.h>
26 : #include <dev/pci/drm/drm_crtc.h>
27 : #include "radeon.h"
28 : #include "atom.h"
29 : #include "radeon_audio.h"
30 :
31 : void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
32 : u8 enable_mask);
33 : void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
34 : u8 enable_mask);
35 : void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
36 : u8 enable_mask);
37 : u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
38 : void dce6_endpoint_wreg(struct radeon_device *rdev,
39 : u32 offset, u32 reg, u32 v);
40 : void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
41 : struct cea_sad *sads, int sad_count);
42 : void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
43 : struct cea_sad *sads, int sad_count);
44 : void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
45 : struct cea_sad *sads, int sad_count);
46 : void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
47 : u8 *sadb, int sad_count);
48 : void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
49 : u8 *sadb, int sad_count);
50 : void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
51 : u8 *sadb, int sad_count);
52 : void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
53 : u8 *sadb, int sad_count);
54 : void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
55 : u8 *sadb, int sad_count);
56 : void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
57 : u8 *sadb, int sad_count);
58 : void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
59 : struct drm_connector *connector, struct drm_display_mode *mode);
60 : void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
61 : struct drm_connector *connector, struct drm_display_mode *mode);
62 : struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
63 : struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
64 : void dce6_afmt_select_pin(struct drm_encoder *encoder);
65 : void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
66 : struct radeon_crtc *crtc, unsigned int clock);
67 : void dce3_2_audio_set_dto(struct radeon_device *rdev,
68 : struct radeon_crtc *crtc, unsigned int clock);
69 : void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
70 : struct radeon_crtc *crtc, unsigned int clock);
71 : void dce4_dp_audio_set_dto(struct radeon_device *rdev,
72 : struct radeon_crtc *crtc, unsigned int clock);
73 : void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
74 : struct radeon_crtc *crtc, unsigned int clock);
75 : void dce6_dp_audio_set_dto(struct radeon_device *rdev,
76 : struct radeon_crtc *crtc, unsigned int clock);
77 : void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
78 : unsigned char *buffer, size_t size);
79 : void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
80 : unsigned char *buffer, size_t size);
81 : void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
82 : const struct radeon_hdmi_acr *acr);
83 : void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
84 : const struct radeon_hdmi_acr *acr);
85 : void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
86 : const struct radeon_hdmi_acr *acr);
87 : void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
88 : void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
89 : void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
90 : u32 offset, int bpc);
91 : void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
92 : void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
93 : void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
94 : void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
95 : void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
96 : void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
97 : static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
98 : struct drm_display_mode *mode);
99 : static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
100 : struct drm_display_mode *mode);
101 : void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
102 : void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
103 : void evergreen_dp_enable(struct drm_encoder *encoder, bool enable);
104 :
105 : static const u32 pin_offsets[7] =
106 : {
107 : (0x5e00 - 0x5e00),
108 : (0x5e18 - 0x5e00),
109 : (0x5e30 - 0x5e00),
110 : (0x5e48 - 0x5e00),
111 : (0x5e60 - 0x5e00),
112 : (0x5e78 - 0x5e00),
113 : (0x5e90 - 0x5e00),
114 : };
115 :
116 0 : static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
117 : {
118 0 : return RREG32(reg);
119 : }
120 :
121 0 : static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
122 : u32 reg, u32 v)
123 : {
124 0 : WREG32(reg, v);
125 0 : }
126 :
127 : static struct radeon_audio_basic_funcs r600_funcs = {
128 : .endpoint_rreg = radeon_audio_rreg,
129 : .endpoint_wreg = radeon_audio_wreg,
130 : .enable = r600_audio_enable,
131 : };
132 :
133 : static struct radeon_audio_basic_funcs dce32_funcs = {
134 : .endpoint_rreg = radeon_audio_rreg,
135 : .endpoint_wreg = radeon_audio_wreg,
136 : .enable = r600_audio_enable,
137 : };
138 :
139 : static struct radeon_audio_basic_funcs dce4_funcs = {
140 : .endpoint_rreg = radeon_audio_rreg,
141 : .endpoint_wreg = radeon_audio_wreg,
142 : .enable = dce4_audio_enable,
143 : };
144 :
145 : static struct radeon_audio_basic_funcs dce6_funcs = {
146 : .endpoint_rreg = dce6_endpoint_rreg,
147 : .endpoint_wreg = dce6_endpoint_wreg,
148 : .enable = dce6_audio_enable,
149 : };
150 :
151 : static struct radeon_audio_funcs r600_hdmi_funcs = {
152 : .get_pin = r600_audio_get_pin,
153 : .set_dto = r600_hdmi_audio_set_dto,
154 : .update_acr = r600_hdmi_update_acr,
155 : .set_vbi_packet = r600_set_vbi_packet,
156 : .set_avi_packet = r600_set_avi_packet,
157 : .set_audio_packet = r600_set_audio_packet,
158 : .set_mute = r600_set_mute,
159 : .mode_set = radeon_audio_hdmi_mode_set,
160 : .dpms = r600_hdmi_enable,
161 : };
162 :
163 : static struct radeon_audio_funcs dce32_hdmi_funcs = {
164 : .get_pin = r600_audio_get_pin,
165 : .write_sad_regs = dce3_2_afmt_write_sad_regs,
166 : .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
167 : .set_dto = dce3_2_audio_set_dto,
168 : .update_acr = dce3_2_hdmi_update_acr,
169 : .set_vbi_packet = r600_set_vbi_packet,
170 : .set_avi_packet = r600_set_avi_packet,
171 : .set_audio_packet = dce3_2_set_audio_packet,
172 : .set_mute = dce3_2_set_mute,
173 : .mode_set = radeon_audio_hdmi_mode_set,
174 : .dpms = r600_hdmi_enable,
175 : };
176 :
177 : static struct radeon_audio_funcs dce32_dp_funcs = {
178 : .get_pin = r600_audio_get_pin,
179 : .write_sad_regs = dce3_2_afmt_write_sad_regs,
180 : .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
181 : .set_dto = dce3_2_audio_set_dto,
182 : .set_avi_packet = r600_set_avi_packet,
183 : .set_audio_packet = dce3_2_set_audio_packet,
184 : };
185 :
186 : static struct radeon_audio_funcs dce4_hdmi_funcs = {
187 : .get_pin = r600_audio_get_pin,
188 : .write_sad_regs = evergreen_hdmi_write_sad_regs,
189 : .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
190 : .write_latency_fields = dce4_afmt_write_latency_fields,
191 : .set_dto = dce4_hdmi_audio_set_dto,
192 : .update_acr = evergreen_hdmi_update_acr,
193 : .set_vbi_packet = dce4_set_vbi_packet,
194 : .set_color_depth = dce4_hdmi_set_color_depth,
195 : .set_avi_packet = evergreen_set_avi_packet,
196 : .set_audio_packet = dce4_set_audio_packet,
197 : .set_mute = dce4_set_mute,
198 : .mode_set = radeon_audio_hdmi_mode_set,
199 : .dpms = evergreen_hdmi_enable,
200 : };
201 :
202 : static struct radeon_audio_funcs dce4_dp_funcs = {
203 : .get_pin = r600_audio_get_pin,
204 : .write_sad_regs = evergreen_hdmi_write_sad_regs,
205 : .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
206 : .write_latency_fields = dce4_afmt_write_latency_fields,
207 : .set_dto = dce4_dp_audio_set_dto,
208 : .set_avi_packet = evergreen_set_avi_packet,
209 : .set_audio_packet = dce4_set_audio_packet,
210 : .mode_set = radeon_audio_dp_mode_set,
211 : .dpms = evergreen_dp_enable,
212 : };
213 :
214 : static struct radeon_audio_funcs dce6_hdmi_funcs = {
215 : .select_pin = dce6_afmt_select_pin,
216 : .get_pin = dce6_audio_get_pin,
217 : .write_sad_regs = dce6_afmt_write_sad_regs,
218 : .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
219 : .write_latency_fields = dce6_afmt_write_latency_fields,
220 : .set_dto = dce6_hdmi_audio_set_dto,
221 : .update_acr = evergreen_hdmi_update_acr,
222 : .set_vbi_packet = dce4_set_vbi_packet,
223 : .set_color_depth = dce4_hdmi_set_color_depth,
224 : .set_avi_packet = evergreen_set_avi_packet,
225 : .set_audio_packet = dce4_set_audio_packet,
226 : .set_mute = dce4_set_mute,
227 : .mode_set = radeon_audio_hdmi_mode_set,
228 : .dpms = evergreen_hdmi_enable,
229 : };
230 :
231 : static struct radeon_audio_funcs dce6_dp_funcs = {
232 : .select_pin = dce6_afmt_select_pin,
233 : .get_pin = dce6_audio_get_pin,
234 : .write_sad_regs = dce6_afmt_write_sad_regs,
235 : .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
236 : .write_latency_fields = dce6_afmt_write_latency_fields,
237 : .set_dto = dce6_dp_audio_set_dto,
238 : .set_avi_packet = evergreen_set_avi_packet,
239 : .set_audio_packet = dce4_set_audio_packet,
240 : .mode_set = radeon_audio_dp_mode_set,
241 : .dpms = evergreen_dp_enable,
242 : };
243 :
244 0 : static void radeon_audio_enable(struct radeon_device *rdev,
245 : struct r600_audio_pin *pin, u8 enable_mask)
246 : {
247 : struct drm_encoder *encoder;
248 : struct radeon_encoder *radeon_encoder;
249 : struct radeon_encoder_atom_dig *dig;
250 : int pin_count = 0;
251 :
252 0 : if (!pin)
253 0 : return;
254 :
255 0 : if (rdev->mode_info.mode_config_initialized) {
256 0 : list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
257 0 : if (radeon_encoder_is_digital(encoder)) {
258 0 : radeon_encoder = to_radeon_encoder(encoder);
259 0 : dig = radeon_encoder->enc_priv;
260 0 : if (dig->pin == pin)
261 0 : pin_count++;
262 : }
263 : }
264 :
265 0 : if ((pin_count > 1) && (enable_mask == 0))
266 0 : return;
267 : }
268 :
269 0 : if (rdev->audio.funcs->enable)
270 0 : rdev->audio.funcs->enable(rdev, pin, enable_mask);
271 0 : }
272 :
273 0 : static void radeon_audio_interface_init(struct radeon_device *rdev)
274 : {
275 0 : if (ASIC_IS_DCE6(rdev)) {
276 0 : rdev->audio.funcs = &dce6_funcs;
277 0 : rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
278 0 : rdev->audio.dp_funcs = &dce6_dp_funcs;
279 0 : } else if (ASIC_IS_DCE4(rdev)) {
280 0 : rdev->audio.funcs = &dce4_funcs;
281 0 : rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
282 0 : rdev->audio.dp_funcs = &dce4_dp_funcs;
283 0 : } else if (ASIC_IS_DCE32(rdev)) {
284 0 : rdev->audio.funcs = &dce32_funcs;
285 0 : rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
286 0 : rdev->audio.dp_funcs = &dce32_dp_funcs;
287 0 : } else {
288 0 : rdev->audio.funcs = &r600_funcs;
289 0 : rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
290 0 : rdev->audio.dp_funcs = 0;
291 : }
292 0 : }
293 :
294 0 : static int radeon_audio_chipset_supported(struct radeon_device *rdev)
295 : {
296 0 : return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
297 : }
298 :
299 0 : int radeon_audio_init(struct radeon_device *rdev)
300 : {
301 : int i;
302 :
303 0 : if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
304 0 : return 0;
305 :
306 0 : rdev->audio.enabled = true;
307 :
308 0 : if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
309 0 : rdev->audio.num_pins = 3;
310 0 : else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
311 0 : rdev->audio.num_pins = 7;
312 0 : else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
313 0 : rdev->audio.num_pins = 7;
314 0 : else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
315 0 : rdev->audio.num_pins = 2;
316 0 : else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
317 0 : rdev->audio.num_pins = 6;
318 0 : else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
319 0 : rdev->audio.num_pins = 6;
320 : else
321 0 : rdev->audio.num_pins = 1;
322 :
323 0 : for (i = 0; i < rdev->audio.num_pins; i++) {
324 0 : rdev->audio.pin[i].channels = -1;
325 0 : rdev->audio.pin[i].rate = -1;
326 0 : rdev->audio.pin[i].bits_per_sample = -1;
327 0 : rdev->audio.pin[i].status_bits = 0;
328 0 : rdev->audio.pin[i].category_code = 0;
329 0 : rdev->audio.pin[i].connected = false;
330 0 : rdev->audio.pin[i].offset = pin_offsets[i];
331 0 : rdev->audio.pin[i].id = i;
332 : }
333 :
334 0 : radeon_audio_interface_init(rdev);
335 :
336 : /* disable audio. it will be set up later */
337 0 : for (i = 0; i < rdev->audio.num_pins; i++)
338 0 : radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
339 :
340 0 : return 0;
341 0 : }
342 :
343 0 : u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
344 : {
345 0 : if (rdev->audio.funcs->endpoint_rreg)
346 0 : return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
347 :
348 0 : return 0;
349 0 : }
350 :
351 0 : void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
352 : u32 reg, u32 v)
353 : {
354 0 : if (rdev->audio.funcs->endpoint_wreg)
355 0 : rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
356 0 : }
357 :
358 0 : static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
359 : {
360 0 : struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
361 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
362 0 : struct cea_sad *sads;
363 : int sad_count;
364 :
365 0 : if (!connector)
366 0 : return;
367 :
368 0 : sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
369 0 : if (sad_count <= 0) {
370 0 : DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
371 0 : return;
372 : }
373 0 : BUG_ON(!sads);
374 :
375 0 : if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
376 0 : radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
377 :
378 0 : kfree(sads);
379 0 : }
380 :
381 0 : static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
382 : {
383 0 : struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
384 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
385 0 : u8 *sadb = NULL;
386 : int sad_count;
387 :
388 0 : if (!connector)
389 0 : return;
390 :
391 0 : sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector),
392 : &sadb);
393 0 : if (sad_count < 0) {
394 : DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
395 : sad_count);
396 : sad_count = 0;
397 : }
398 :
399 0 : if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
400 0 : radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
401 :
402 0 : kfree(sadb);
403 0 : }
404 :
405 0 : static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
406 : struct drm_display_mode *mode)
407 : {
408 0 : struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
409 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
410 :
411 0 : if (!connector)
412 0 : return;
413 :
414 0 : if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
415 0 : radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
416 0 : }
417 :
418 0 : struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
419 : {
420 0 : struct radeon_device *rdev = encoder->dev->dev_private;
421 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
422 :
423 0 : if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
424 0 : return radeon_encoder->audio->get_pin(rdev);
425 :
426 0 : return NULL;
427 0 : }
428 :
429 0 : static void radeon_audio_select_pin(struct drm_encoder *encoder)
430 : {
431 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
432 :
433 0 : if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
434 0 : radeon_encoder->audio->select_pin(encoder);
435 0 : }
436 :
437 0 : void radeon_audio_detect(struct drm_connector *connector,
438 : struct drm_encoder *encoder,
439 : enum drm_connector_status status)
440 : {
441 0 : struct drm_device *dev = connector->dev;
442 0 : struct radeon_device *rdev = dev->dev_private;
443 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
444 : struct radeon_encoder_atom_dig *dig;
445 :
446 0 : if (!radeon_audio_chipset_supported(rdev))
447 0 : return;
448 :
449 0 : if (!radeon_encoder_is_digital(encoder))
450 0 : return;
451 :
452 0 : dig = radeon_encoder->enc_priv;
453 :
454 0 : if (status == connector_status_connected) {
455 0 : if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
456 0 : struct radeon_connector *radeon_connector = to_radeon_connector(connector);
457 :
458 0 : if (radeon_dp_getsinktype(radeon_connector) ==
459 : CONNECTOR_OBJECT_ID_DISPLAYPORT)
460 0 : radeon_encoder->audio = rdev->audio.dp_funcs;
461 : else
462 0 : radeon_encoder->audio = rdev->audio.hdmi_funcs;
463 0 : } else {
464 0 : radeon_encoder->audio = rdev->audio.hdmi_funcs;
465 : }
466 :
467 0 : if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
468 0 : if (!dig->pin)
469 0 : dig->pin = radeon_audio_get_pin(encoder);
470 0 : radeon_audio_enable(rdev, dig->pin, 0xf);
471 0 : } else {
472 0 : radeon_audio_enable(rdev, dig->pin, 0);
473 0 : dig->pin = NULL;
474 : }
475 : } else {
476 0 : radeon_audio_enable(rdev, dig->pin, 0);
477 0 : dig->pin = NULL;
478 : }
479 0 : }
480 :
481 0 : void radeon_audio_fini(struct radeon_device *rdev)
482 : {
483 : int i;
484 :
485 0 : if (!rdev->audio.enabled)
486 0 : return;
487 :
488 0 : for (i = 0; i < rdev->audio.num_pins; i++)
489 0 : radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
490 :
491 0 : rdev->audio.enabled = false;
492 0 : }
493 :
494 0 : static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
495 : {
496 0 : struct radeon_device *rdev = encoder->dev->dev_private;
497 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
498 0 : struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
499 :
500 0 : if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
501 0 : radeon_encoder->audio->set_dto(rdev, crtc, clock);
502 0 : }
503 :
504 0 : static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
505 : struct drm_display_mode *mode)
506 : {
507 0 : struct radeon_device *rdev = encoder->dev->dev_private;
508 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
509 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
510 0 : struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
511 0 : u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
512 0 : struct hdmi_avi_infoframe frame;
513 : int err;
514 :
515 0 : if (!connector)
516 0 : return -EINVAL;
517 :
518 0 : err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
519 0 : if (err < 0) {
520 0 : DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
521 0 : return err;
522 : }
523 :
524 0 : if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) {
525 0 : if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) {
526 0 : if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB)
527 0 : frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED;
528 : else
529 0 : frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL;
530 : } else {
531 0 : frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
532 : }
533 : }
534 :
535 0 : err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
536 0 : if (err < 0) {
537 0 : DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
538 0 : return err;
539 : }
540 :
541 0 : if (dig && dig->afmt && radeon_encoder->audio &&
542 0 : radeon_encoder->audio->set_avi_packet)
543 0 : radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
544 : buffer, sizeof(buffer));
545 :
546 0 : return 0;
547 0 : }
548 :
549 : /*
550 : * calculate CTS and N values if they are not found in the table
551 : */
552 0 : static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
553 : {
554 : int n, cts;
555 : unsigned long div, mul;
556 :
557 : /* Safe, but overly large values */
558 0 : n = 128 * freq;
559 0 : cts = clock * 1000;
560 :
561 : /* Smallest valid fraction */
562 0 : div = gcd(n, cts);
563 :
564 0 : n /= div;
565 0 : cts /= div;
566 :
567 : /*
568 : * The optimal N is 128*freq/1000. Calculate the closest larger
569 : * value that doesn't truncate any bits.
570 : */
571 0 : mul = ((128*freq/1000) + (n-1))/n;
572 :
573 0 : n *= mul;
574 0 : cts *= mul;
575 :
576 : /* Check that we are in spec (not always possible) */
577 0 : if (n < (128*freq/1500))
578 0 : printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
579 0 : if (n > (128*freq/300))
580 0 : printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
581 :
582 0 : *N = n;
583 0 : *CTS = cts;
584 :
585 : DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
586 : *N, *CTS, freq);
587 0 : }
588 :
589 0 : static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
590 : {
591 : static struct radeon_hdmi_acr res;
592 : u8 i;
593 :
594 : static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
595 : /* 32kHz 44.1kHz 48kHz */
596 : /* Clock N CTS N CTS N CTS */
597 : { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
598 : { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
599 : { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
600 : { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
601 : { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
602 : { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
603 : { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
604 : { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
605 : { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
606 : { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
607 : };
608 :
609 : /* Precalculated values for common clocks */
610 0 : for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
611 0 : if (hdmi_predefined_acr[i].clock == clock)
612 0 : return &hdmi_predefined_acr[i];
613 :
614 : /* And odd clocks get manually calculated */
615 0 : radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
616 0 : radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
617 0 : radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
618 :
619 0 : return &res;
620 0 : }
621 :
622 : /*
623 : * update the N and CTS parameters for a given pixel clock rate
624 : */
625 0 : static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
626 : {
627 0 : const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
628 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
629 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
630 :
631 0 : if (!dig || !dig->afmt)
632 0 : return;
633 :
634 0 : if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
635 0 : radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
636 0 : }
637 :
638 0 : static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
639 : {
640 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
641 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
642 :
643 0 : if (!dig || !dig->afmt)
644 0 : return;
645 :
646 0 : if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
647 0 : radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
648 0 : }
649 :
650 0 : static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
651 : {
652 : int bpc = 8;
653 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
654 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
655 :
656 0 : if (!dig || !dig->afmt)
657 0 : return;
658 :
659 0 : if (encoder->crtc) {
660 0 : struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
661 0 : bpc = radeon_crtc->bpc;
662 0 : }
663 :
664 0 : if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
665 0 : radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
666 0 : }
667 :
668 0 : static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
669 : {
670 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
671 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
672 :
673 0 : if (!dig || !dig->afmt)
674 0 : return;
675 :
676 0 : if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
677 0 : radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
678 0 : }
679 :
680 0 : static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
681 : {
682 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
683 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
684 :
685 0 : if (!dig || !dig->afmt)
686 0 : return;
687 :
688 0 : if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
689 0 : radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
690 0 : }
691 :
692 : /*
693 : * update the info frames with the data from the current display mode
694 : */
695 0 : static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
696 : struct drm_display_mode *mode)
697 : {
698 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
699 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
700 0 : struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
701 :
702 0 : if (!dig || !dig->afmt)
703 0 : return;
704 :
705 0 : if (!connector)
706 0 : return;
707 :
708 0 : if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
709 0 : radeon_audio_set_mute(encoder, true);
710 :
711 0 : radeon_audio_write_speaker_allocation(encoder);
712 0 : radeon_audio_write_sad_regs(encoder);
713 0 : radeon_audio_write_latency_fields(encoder, mode);
714 0 : radeon_audio_set_dto(encoder, mode->clock);
715 0 : radeon_audio_set_vbi_packet(encoder);
716 0 : radeon_hdmi_set_color_depth(encoder);
717 0 : radeon_audio_update_acr(encoder, mode->clock);
718 0 : radeon_audio_set_audio_packet(encoder);
719 0 : radeon_audio_select_pin(encoder);
720 :
721 0 : if (radeon_audio_set_avi_packet(encoder, mode) < 0)
722 0 : return;
723 :
724 0 : radeon_audio_set_mute(encoder, false);
725 0 : } else {
726 0 : radeon_hdmi_set_color_depth(encoder);
727 :
728 0 : if (radeon_audio_set_avi_packet(encoder, mode) < 0)
729 0 : return;
730 : }
731 0 : }
732 :
733 0 : static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
734 : struct drm_display_mode *mode)
735 : {
736 0 : struct drm_device *dev = encoder->dev;
737 0 : struct radeon_device *rdev = dev->dev_private;
738 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
739 0 : struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
740 0 : struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
741 :
742 0 : if (!dig || !dig->afmt)
743 0 : return;
744 :
745 0 : if (!connector)
746 0 : return;
747 :
748 0 : if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
749 0 : radeon_audio_write_speaker_allocation(encoder);
750 0 : radeon_audio_write_sad_regs(encoder);
751 0 : radeon_audio_write_latency_fields(encoder, mode);
752 0 : radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10);
753 0 : radeon_audio_set_audio_packet(encoder);
754 0 : radeon_audio_select_pin(encoder);
755 :
756 0 : if (radeon_audio_set_avi_packet(encoder, mode) < 0)
757 0 : return;
758 : }
759 0 : }
760 :
761 0 : void radeon_audio_mode_set(struct drm_encoder *encoder,
762 : struct drm_display_mode *mode)
763 : {
764 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
765 :
766 0 : if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
767 0 : radeon_encoder->audio->mode_set(encoder, mode);
768 0 : }
769 :
770 0 : void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
771 : {
772 0 : struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
773 :
774 0 : if (radeon_encoder->audio && radeon_encoder->audio->dpms)
775 0 : radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
776 0 : }
777 :
778 0 : unsigned int radeon_audio_decode_dfs_div(unsigned int div)
779 : {
780 0 : if (div >= 8 && div < 64)
781 0 : return (div - 8) * 25 + 200;
782 0 : else if (div >= 64 && div < 96)
783 0 : return (div - 64) * 50 + 1600;
784 0 : else if (div >= 96 && div < 128)
785 0 : return (div - 96) * 100 + 3200;
786 : else
787 0 : return 0;
788 0 : }
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