Line data Source code
1 : /*
2 : * Copyright 2009 Jerome Glisse.
3 : *
4 : * Permission is hereby granted, free of charge, to any person obtaining a
5 : * copy of this software and associated documentation files (the "Software"),
6 : * to deal in the Software without restriction, including without limitation
7 : * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 : * and/or sell copies of the Software, and to permit persons to whom the
9 : * Software is furnished to do so, subject to the following conditions:
10 : *
11 : * The above copyright notice and this permission notice shall be included in
12 : * all copies or substantial portions of the Software.
13 : *
14 : * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 : * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 : * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 : * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 : * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 : * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 : * OTHER DEALINGS IN THE SOFTWARE.
21 : *
22 : * Authors: Jerome Glisse
23 : */
24 : #include <dev/pci/drm/drmP.h>
25 : #include <dev/pci/drm/radeon_drm.h>
26 : #include "radeon_reg.h"
27 : #include "radeon.h"
28 :
29 : #define RADEON_BENCHMARK_COPY_BLIT 1
30 : #define RADEON_BENCHMARK_COPY_DMA 0
31 :
32 : #define RADEON_BENCHMARK_ITERATIONS 1024
33 : #define RADEON_BENCHMARK_COMMON_MODES_N 17
34 :
35 0 : static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
36 : uint64_t saddr, uint64_t daddr,
37 : int flag, int n,
38 : struct reservation_object *resv)
39 : {
40 : unsigned long start_jiffies;
41 : unsigned long end_jiffies;
42 0 : struct radeon_fence *fence = NULL;
43 : int i, r;
44 :
45 0 : start_jiffies = jiffies;
46 0 : for (i = 0; i < n; i++) {
47 0 : switch (flag) {
48 : case RADEON_BENCHMARK_COPY_DMA:
49 0 : fence = radeon_copy_dma(rdev, saddr, daddr,
50 : size / RADEON_GPU_PAGE_SIZE,
51 : resv);
52 0 : break;
53 : case RADEON_BENCHMARK_COPY_BLIT:
54 0 : fence = radeon_copy_blit(rdev, saddr, daddr,
55 : size / RADEON_GPU_PAGE_SIZE,
56 : resv);
57 0 : break;
58 : default:
59 0 : DRM_ERROR("Unknown copy method\n");
60 0 : return -EINVAL;
61 : }
62 0 : if (IS_ERR(fence))
63 0 : return PTR_ERR(fence);
64 :
65 0 : r = radeon_fence_wait(fence, false);
66 0 : radeon_fence_unref(&fence);
67 0 : if (r)
68 0 : return r;
69 : }
70 0 : end_jiffies = jiffies;
71 0 : return jiffies_to_msecs(end_jiffies - start_jiffies);
72 0 : }
73 :
74 :
75 0 : static void radeon_benchmark_log_results(int n, unsigned size,
76 : unsigned int time,
77 : unsigned sdomain, unsigned ddomain,
78 : char *kind)
79 : {
80 : #ifdef DRMDEBUG
81 : unsigned int throughput = (n * (size >> 10)) / time;
82 : #endif
83 : DRM_INFO("radeon: %s %u bo moves of %u kB from"
84 : " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
85 : kind, n, size >> 10, sdomain, ddomain, time,
86 : throughput * 8, throughput);
87 0 : }
88 :
89 0 : static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
90 : unsigned sdomain, unsigned ddomain)
91 : {
92 0 : struct radeon_bo *dobj = NULL;
93 0 : struct radeon_bo *sobj = NULL;
94 0 : uint64_t saddr, daddr;
95 : int r, n;
96 : int time;
97 :
98 : n = RADEON_BENCHMARK_ITERATIONS;
99 0 : r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, 0, NULL, NULL, &sobj);
100 0 : if (r) {
101 : goto out_cleanup;
102 : }
103 0 : r = radeon_bo_reserve(sobj, false);
104 0 : if (unlikely(r != 0))
105 : goto out_cleanup;
106 0 : r = radeon_bo_pin(sobj, sdomain, &saddr);
107 0 : radeon_bo_unreserve(sobj);
108 0 : if (r) {
109 : goto out_cleanup;
110 : }
111 0 : r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, 0, NULL, NULL, &dobj);
112 0 : if (r) {
113 : goto out_cleanup;
114 : }
115 0 : r = radeon_bo_reserve(dobj, false);
116 0 : if (unlikely(r != 0))
117 : goto out_cleanup;
118 0 : r = radeon_bo_pin(dobj, ddomain, &daddr);
119 0 : radeon_bo_unreserve(dobj);
120 0 : if (r) {
121 : goto out_cleanup;
122 : }
123 :
124 0 : if (rdev->asic->copy.dma) {
125 0 : time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
126 : RADEON_BENCHMARK_COPY_DMA, n,
127 0 : dobj->tbo.resv);
128 0 : if (time < 0)
129 : goto out_cleanup;
130 0 : if (time > 0)
131 0 : radeon_benchmark_log_results(n, size, time,
132 : sdomain, ddomain, "dma");
133 : }
134 :
135 0 : if (rdev->asic->copy.blit) {
136 0 : time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
137 : RADEON_BENCHMARK_COPY_BLIT, n,
138 0 : dobj->tbo.resv);
139 0 : if (time < 0)
140 : goto out_cleanup;
141 0 : if (time > 0)
142 0 : radeon_benchmark_log_results(n, size, time,
143 : sdomain, ddomain, "blit");
144 : }
145 :
146 : out_cleanup:
147 0 : if (sobj) {
148 0 : r = radeon_bo_reserve(sobj, false);
149 0 : if (likely(r == 0)) {
150 0 : radeon_bo_unpin(sobj);
151 0 : radeon_bo_unreserve(sobj);
152 0 : }
153 0 : radeon_bo_unref(&sobj);
154 0 : }
155 0 : if (dobj) {
156 0 : r = radeon_bo_reserve(dobj, false);
157 0 : if (likely(r == 0)) {
158 0 : radeon_bo_unpin(dobj);
159 0 : radeon_bo_unreserve(dobj);
160 0 : }
161 0 : radeon_bo_unref(&dobj);
162 0 : }
163 :
164 0 : if (r) {
165 0 : DRM_ERROR("Error while benchmarking BO move.\n");
166 0 : }
167 0 : }
168 :
169 0 : void radeon_benchmark(struct radeon_device *rdev, int test_number)
170 : {
171 : int i;
172 0 : int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
173 : 640 * 480 * 4,
174 : 720 * 480 * 4,
175 : 800 * 600 * 4,
176 : 848 * 480 * 4,
177 : 1024 * 768 * 4,
178 : 1152 * 768 * 4,
179 : 1280 * 720 * 4,
180 : 1280 * 800 * 4,
181 : 1280 * 854 * 4,
182 : 1280 * 960 * 4,
183 : 1280 * 1024 * 4,
184 : 1440 * 900 * 4,
185 : 1400 * 1050 * 4,
186 : 1680 * 1050 * 4,
187 : 1600 * 1200 * 4,
188 : 1920 * 1080 * 4,
189 : 1920 * 1200 * 4
190 : };
191 :
192 0 : switch (test_number) {
193 : case 1:
194 : /* simple test, VRAM to GTT and GTT to VRAM */
195 0 : radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
196 : RADEON_GEM_DOMAIN_VRAM);
197 0 : radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
198 : RADEON_GEM_DOMAIN_GTT);
199 0 : break;
200 : case 2:
201 : /* simple test, VRAM to VRAM */
202 0 : radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
203 : RADEON_GEM_DOMAIN_VRAM);
204 0 : break;
205 : case 3:
206 : /* GTT to VRAM, buffer size sweep, powers of 2 */
207 0 : for (i = 1; i <= 16384; i <<= 1)
208 0 : radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
209 : RADEON_GEM_DOMAIN_GTT,
210 : RADEON_GEM_DOMAIN_VRAM);
211 : break;
212 : case 4:
213 : /* VRAM to GTT, buffer size sweep, powers of 2 */
214 0 : for (i = 1; i <= 16384; i <<= 1)
215 0 : radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
216 : RADEON_GEM_DOMAIN_VRAM,
217 : RADEON_GEM_DOMAIN_GTT);
218 : break;
219 : case 5:
220 : /* VRAM to VRAM, buffer size sweep, powers of 2 */
221 0 : for (i = 1; i <= 16384; i <<= 1)
222 0 : radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
223 : RADEON_GEM_DOMAIN_VRAM,
224 : RADEON_GEM_DOMAIN_VRAM);
225 : break;
226 : case 6:
227 : /* GTT to VRAM, buffer size sweep, common modes */
228 0 : for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
229 0 : radeon_benchmark_move(rdev, common_modes[i],
230 : RADEON_GEM_DOMAIN_GTT,
231 : RADEON_GEM_DOMAIN_VRAM);
232 : break;
233 : case 7:
234 : /* VRAM to GTT, buffer size sweep, common modes */
235 0 : for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
236 0 : radeon_benchmark_move(rdev, common_modes[i],
237 : RADEON_GEM_DOMAIN_VRAM,
238 : RADEON_GEM_DOMAIN_GTT);
239 : break;
240 : case 8:
241 : /* VRAM to VRAM, buffer size sweep, common modes */
242 0 : for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
243 0 : radeon_benchmark_move(rdev, common_modes[i],
244 : RADEON_GEM_DOMAIN_VRAM,
245 : RADEON_GEM_DOMAIN_VRAM);
246 : break;
247 :
248 : default:
249 0 : DRM_ERROR("Unknown benchmark\n");
250 0 : }
251 0 : }
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