LCOV - code coverage report

Current view: top level - dev/pci/drm/radeon - si.c (source / functions) Hit Total Coverage Test: 6.4 Lines: 0 3285 0.0 % Date: 2018-10-19 03:25:38 Functions: 0 117 0.0 % Legend: Lines: hit not hit

Function Name	Hit count
dce6_available_bandwidth	0
dce6_average_bandwidth	0
dce6_average_bandwidth_vs_available_bandwidth	0
dce6_average_bandwidth_vs_dram_bandwidth_for_display	0
dce6_bandwidth_update	0
dce6_check_latency_hiding	0
dce6_data_return_bandwidth	0
dce6_dmif_request_bandwidth	0
dce6_dram_bandwidth	0
dce6_dram_bandwidth_for_display	0
dce6_get_dmif_bytes_per_request	0
dce6_latency_watermark	0
dce6_line_buffer_adjust	0
dce6_program_watermarks	0
si_asic_reset	0
si_cp_enable	0
si_cp_fini	0
si_cp_load_microcode	0
si_cp_resume	0
si_cp_start	0
si_create_bitmask	0
si_disable_interrupt_state	0
si_disable_interrupts	0
si_enable_bif_mgls	0
si_enable_cgcg	0
si_enable_dma_mgcg	0
si_enable_dma_pg	0
si_enable_gfx_cgpg	0
si_enable_gui_idle_interrupt	0
si_enable_hdp_ls	0
si_enable_hdp_mgcg	0
si_enable_interrupts	0
si_enable_lbpw	0
si_enable_mc_ls	0
si_enable_mc_mgcg	0
si_enable_mgcg	0
si_enable_uvd_mgcg	0
si_fence_ring_emit	0
si_fini	0
si_fini_cg	0
si_fini_pg	0
si_get_allowed_info_register	0
si_get_csb_buffer	0
si_get_csb_size	0
si_get_cu_active_bitmap	0
si_get_cu_enabled	0
si_get_gpu_clock_counter	0
si_get_ih_wptr	0
si_get_number_of_dram_channels	0
si_get_rb_disabled	0
si_get_temp	0
si_get_xclk	0
si_gfx_is_lockup	0
si_gpu_check_soft_reset	0
si_gpu_init	0
si_gpu_pci_config_reset	0
si_gpu_soft_reset	0
si_halt_rlc	0
si_ib_parse	0
si_init	0
si_init_ao_cu_mask	0
si_init_cg	0
si_init_dma_pg	0
si_init_gfx_cgpg	0
si_init_golden_registers	0
si_init_microcode	0
si_init_pg	0
si_init_uvd_internal_cg	0
si_irq_ack	0
si_irq_disable	0
si_irq_fini	0
si_irq_init	0
si_irq_process	0
si_irq_set	0
si_irq_suspend	0
si_lbpw_supported	0
si_mc_init	0
si_mc_load_microcode	0
si_mc_program	0
si_pcie_gart_disable	0
si_pcie_gart_enable	0
si_pcie_gart_fini	0
si_pcie_gart_tlb_flush	0
si_pcie_gen3_enable	0
si_program_aspm	0
si_resume	0
si_ring_ib_execute	0
si_rlc_reset	0
si_rlc_resume	0
si_rlc_start	0
si_rlc_stop	0
si_scratch_init	0
si_select_se_sh	0
si_set_clk_bypass_mode	0
si_set_uvd_clocks	0
si_set_uvd_dcm	0
si_set_vce_clocks	0
si_setup_rb	0
si_setup_spi	0
si_spll_powerdown	0
si_startup	0
si_suspend	0
si_tiling_mode_table_init	0
si_update_cg	0
si_update_rlc	0
si_vce_send_vcepll_ctlreq	0
si_vm_decode_fault	0
si_vm_fini	0
si_vm_flush	0
si_vm_init	0
si_vm_packet3_ce_check	0
si_vm_packet3_compute_check	0
si_vm_packet3_cp_dma_check	0
si_vm_packet3_gfx_check	0
si_vm_reg_valid	0
si_vram_gtt_location	0
si_wait_for_rlc_serdes	0

Generated by: LCOV version 1.13