Line data    Source code

       1             : /*
       2             :  * Copyright 2013 Advanced Micro Devices, Inc.
       3             :  *
       4             :  * Permission is hereby granted, free of charge, to any person obtaining a
       5             :  * copy of this software and associated documentation files (the "Software"),
       6             :  * to deal in the Software without restriction, including without limitation
       7             :  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
       8             :  * and/or sell copies of the Software, and to permit persons to whom the
       9             :  * Software is furnished to do so, subject to the following conditions:
      10             :  *
      11             :  * The above copyright notice and this permission notice shall be included in
      12             :  * all copies or substantial portions of the Software.
      13             :  *
      14             :  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
      15             :  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
      16             :  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
      17             :  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
      18             :  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
      19             :  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
      20             :  * OTHER DEALINGS IN THE SOFTWARE.
      21             :  *
      22             :  * Authors: Christian König <christian.koenig@amd.com>
      23             :  */
      24             : 
      25             : #include <dev/pci/drm/drmP.h>
      26             : #include "radeon.h"
      27             : #include "radeon_asic.h"
      28             : #include "cikd.h"
      29             : 
      30             : /**
      31             :  * uvd_v4_2_resume - memory controller programming
      32             :  *
      33             :  * @rdev: radeon_device pointer
      34             :  *
      35             :  * Let the UVD memory controller know it's offsets
      36             :  */
      37           0 : int uvd_v4_2_resume(struct radeon_device *rdev)
      38             : {
      39             :         uint64_t addr;
      40             :         uint32_t size;
      41             : 
      42             :         /* programm the VCPU memory controller bits 0-27 */
      43           0 :         addr = rdev->uvd.gpu_addr >> 3;
      44           0 :         size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3;
      45           0 :         WREG32(UVD_VCPU_CACHE_OFFSET0, addr);
      46           0 :         WREG32(UVD_VCPU_CACHE_SIZE0, size);
      47             : 
      48           0 :         addr += size;
      49             :         size = RADEON_UVD_STACK_SIZE >> 3;
      50           0 :         WREG32(UVD_VCPU_CACHE_OFFSET1, addr);
      51           0 :         WREG32(UVD_VCPU_CACHE_SIZE1, size);
      52             : 
      53           0 :         addr += size;
      54             :         size = RADEON_UVD_HEAP_SIZE >> 3;
      55           0 :         WREG32(UVD_VCPU_CACHE_OFFSET2, addr);
      56           0 :         WREG32(UVD_VCPU_CACHE_SIZE2, size);
      57             : 
      58             :         /* bits 28-31 */
      59           0 :         addr = (rdev->uvd.gpu_addr >> 28) & 0xF;
      60           0 :         WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));
      61             : 
      62             :         /* bits 32-39 */
      63           0 :         addr = (rdev->uvd.gpu_addr >> 32) & 0xFF;
      64           0 :         WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));
      65             : 
      66           0 :         return 0;
      67             : }