Line data Source code
1 : /* $OpenBSD: if_xl_pci.c,v 1.46 2015/11/24 17:11:40 mpi Exp $ */
2 :
3 : /*
4 : * Copyright (c) 1997, 1998, 1999
5 : * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
6 : *
7 : * Redistribution and use in source and binary forms, with or without
8 : * modification, are permitted provided that the following conditions
9 : * are met:
10 : * 1. Redistributions of source code must retain the above copyright
11 : * notice, this list of conditions and the following disclaimer.
12 : * 2. Redistributions in binary form must reproduce the above copyright
13 : * notice, this list of conditions and the following disclaimer in the
14 : * documentation and/or other materials provided with the distribution.
15 : * 3. All advertising materials mentioning features or use of this software
16 : * must display the following acknowledgement:
17 : * This product includes software developed by Bill Paul.
18 : * 4. Neither the name of the author nor the names of any co-contributors
19 : * may be used to endorse or promote products derived from this software
20 : * without specific prior written permission.
21 : *
22 : * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 : * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 : * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 : * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 : * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 : * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 : * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 : * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 : * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 : * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 : * THE POSSIBILITY OF SUCH DAMAGE.
33 : *
34 : * $FreeBSD: if_xl.c,v 1.72 2000/01/09 21:12:59 wpaul Exp $
35 : */
36 :
37 : #include "bpfilter.h"
38 :
39 : #include <sys/param.h>
40 : #include <sys/systm.h>
41 : #include <sys/mbuf.h>
42 : #include <sys/protosw.h>
43 : #include <sys/socket.h>
44 : #include <sys/ioctl.h>
45 : #include <sys/errno.h>
46 : #include <sys/malloc.h>
47 : #include <sys/kernel.h>
48 : #include <sys/device.h>
49 :
50 : #include <net/if.h>
51 : #include <net/if_media.h>
52 :
53 : #include <netinet/in.h>
54 : #include <netinet/if_ether.h>
55 :
56 : #include <dev/mii/miivar.h>
57 : #include <dev/pci/pcireg.h>
58 : #include <dev/pci/pcivar.h>
59 : #include <dev/pci/pcidevs.h>
60 :
61 : #if NBPFILTER > 0
62 : #include <net/bpf.h>
63 : #endif
64 :
65 : /*
66 : * The following #define causes the code to use PIO to access the
67 : * chip's registers instead of memory mapped mode. The reason PIO mode
68 : * is on by default is that the Etherlink XL manual seems to indicate
69 : * that only the newer revision chips (3c905B) support both PIO and
70 : * memory mapped access. Since we want to be compatible with the older
71 : * bus master chips, we use PIO here. If you comment this out, the
72 : * driver will use memory mapped I/O, which may be faster but which
73 : * might not work on some devices.
74 : */
75 : #define XL_USEIOSPACE
76 :
77 : #define XL_PCI_FUNCMEM 0x0018
78 : #define XL_PCI_INTR 0x0004
79 : #define XL_PCI_INTRACK 0x8000
80 :
81 : #include <dev/ic/xlreg.h>
82 :
83 : int xl_pci_match(struct device *, void *, void *);
84 : void xl_pci_attach(struct device *, struct device *, void *);
85 : int xl_pci_detach(struct device *, int);
86 : void xl_pci_intr_ack(struct xl_softc *);
87 : #ifndef SMALL_KERNEL
88 : void xl_pci_wol_power(void *);
89 : #endif
90 :
91 : struct xl_pci_softc {
92 : struct xl_softc psc_softc;
93 : pci_chipset_tag_t psc_pc;
94 : pcitag_t psc_tag;
95 : bus_size_t psc_iosize;
96 : bus_size_t psc_funsize;
97 : };
98 :
99 : struct cfattach xl_pci_ca = {
100 : sizeof(struct xl_pci_softc), xl_pci_match, xl_pci_attach,
101 : xl_pci_detach, xl_activate
102 : };
103 :
104 : const struct pci_matchid xl_pci_devices[] = {
105 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSOHO100TX },
106 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900TPO },
107 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900COMBO },
108 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900B },
109 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BCOMBO },
110 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BTPC },
111 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BFL },
112 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905TX },
113 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905T4 },
114 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BTX },
115 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BT4 },
116 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BCOMBO },
117 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BFX },
118 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980TX },
119 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980CTX },
120 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905CTX },
121 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C450 },
122 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C555 },
123 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556 },
124 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556B },
125 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C9201 },
126 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C920BEMBW },
127 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C575 },
128 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575BT },
129 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575CT },
130 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656 },
131 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656B },
132 : { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656C },
133 : };
134 :
135 : int
136 0 : xl_pci_match(struct device *parent, void *match, void *aux)
137 : {
138 0 : return (pci_matchbyid((struct pci_attach_args *)aux, xl_pci_devices,
139 : nitems(xl_pci_devices)));
140 : }
141 :
142 : void
143 0 : xl_pci_attach(struct device *parent, struct device *self, void *aux)
144 : {
145 0 : struct xl_pci_softc *psc = (void *)self;
146 0 : struct xl_softc *sc = &psc->psc_softc;
147 0 : struct pci_attach_args *pa = aux;
148 0 : pci_chipset_tag_t pc = pa->pa_pc;
149 0 : pci_intr_handle_t ih;
150 : const char *intrstr = NULL;
151 0 : bus_size_t iosize, funsize;
152 : #ifndef SMALL_KERNEL
153 : u_int32_t command;
154 : #endif
155 :
156 0 : psc->psc_pc = pc;
157 0 : psc->psc_tag = pa->pa_tag;
158 0 : sc->sc_dmat = pa->pa_dmat;
159 :
160 0 : sc->xl_flags = 0;
161 0 : sc->wol_power = sc->wol_power_arg = NULL;
162 :
163 : /* set required flags */
164 0 : switch (PCI_PRODUCT(pa->pa_id)) {
165 : case TC_DEVICEID_HURRICANE_555:
166 0 : sc->xl_flags |= XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM;
167 0 : break;
168 : case TC_DEVICEID_HURRICANE_556:
169 0 : sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK |
170 : XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET;
171 0 : sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR;
172 0 : sc->xl_flags |= XL_FLAG_8BITROM;
173 0 : break;
174 : case TC_DEVICEID_HURRICANE_556B:
175 0 : sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK |
176 : XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET;
177 0 : sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR;
178 0 : break;
179 : case PCI_PRODUCT_3COM_3C9201:
180 : case PCI_PRODUCT_3COM_3C920BEMBW:
181 0 : sc->xl_flags |= XL_FLAG_PHYOK;
182 0 : break;
183 : case TC_DEVICEID_BOOMERANG_10_100BT:
184 0 : sc->xl_flags |= XL_FLAG_NO_MMIO;
185 0 : break;
186 : case PCI_PRODUCT_3COM_3C575:
187 0 : sc->xl_flags |= XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 |
188 : XL_FLAG_8BITROM;
189 0 : break;
190 : case PCI_PRODUCT_3COM_3CCFE575BT:
191 : sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 |
192 : XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR;
193 0 : sc->xl_flags |= XL_FLAG_FUNCREG;
194 0 : break;
195 : case PCI_PRODUCT_3COM_3CCFE575CT:
196 : sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 |
197 : XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR;
198 0 : sc->xl_flags |= XL_FLAG_FUNCREG;
199 0 : break;
200 : case PCI_PRODUCT_3COM_3CCFEM656:
201 : sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 |
202 : XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR |
203 : XL_FLAG_INVERT_MII_PWR;
204 0 : sc->xl_flags |= XL_FLAG_FUNCREG;
205 0 : break;
206 : case PCI_PRODUCT_3COM_3CCFEM656B:
207 : sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 |
208 : XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR |
209 : XL_FLAG_INVERT_MII_PWR;
210 0 : sc->xl_flags |= XL_FLAG_FUNCREG;
211 0 : break;
212 : case PCI_PRODUCT_3COM_3CCFEM656C:
213 : sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 |
214 : XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR;
215 0 : sc->xl_flags |= XL_FLAG_FUNCREG;
216 0 : break;
217 : default:
218 : break;
219 : }
220 :
221 0 : pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0);
222 :
223 : #ifndef SMALL_KERNEL
224 : /*
225 : * The card is WOL-capable if it supports PME# assertion
226 : * from D3hot power state. Install a callback to configure
227 : * PCI power state for WOL. It will be invoked when the
228 : * interface stops and WOL was enabled.
229 : */
230 0 : command = pci_conf_read(pc, pa->pa_tag, XL_PCI_CAPID);
231 0 : if ((command >> 16) & XL_PME_CAP_D3_HOT) {
232 0 : sc->wol_power = xl_pci_wol_power;
233 0 : sc->wol_power_arg = psc;
234 0 : }
235 : #endif
236 :
237 : /*
238 : * Map control/status registers.
239 : */
240 : #ifdef XL_USEIOSPACE
241 0 : if (pci_mapreg_map(pa, XL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
242 0 : &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) {
243 0 : printf(": can't map i/o space\n");
244 0 : return;
245 : }
246 : #else
247 : if (pci_mapreg_map(pa, XL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
248 : &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) {
249 : printf(": can't map i/o space\n");
250 : return;
251 : }
252 : #endif
253 0 : psc->psc_iosize = iosize;
254 :
255 0 : if (sc->xl_flags & XL_FLAG_FUNCREG) {
256 0 : if (pci_mapreg_map(pa, XL_PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0,
257 0 : &sc->xl_funct, &sc->xl_funch, NULL, &funsize, 0)) {
258 0 : printf(": can't map i/o space\n");
259 0 : bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize);
260 0 : return;
261 : }
262 0 : psc->psc_funsize = funsize;
263 0 : sc->intr_ack = xl_pci_intr_ack;
264 0 : }
265 :
266 : /*
267 : * Allocate our interrupt.
268 : */
269 0 : if (pci_intr_map(pa, &ih)) {
270 0 : printf(": couldn't map interrupt\n");
271 0 : bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize);
272 0 : if (sc->xl_flags & XL_FLAG_FUNCREG)
273 0 : bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize);
274 0 : return;
275 : }
276 :
277 0 : intrstr = pci_intr_string(pc, ih);
278 0 : sc->xl_intrhand = pci_intr_establish(pc, ih, IPL_NET, xl_intr, sc,
279 0 : self->dv_xname);
280 0 : if (sc->xl_intrhand == NULL) {
281 0 : printf(": couldn't establish interrupt");
282 0 : if (intrstr != NULL)
283 0 : printf(" at %s", intrstr);
284 0 : bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize);
285 0 : if (sc->xl_flags & XL_FLAG_FUNCREG)
286 0 : bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize);
287 0 : return;
288 : }
289 0 : printf(": %s", intrstr);
290 :
291 0 : xl_attach(sc);
292 0 : }
293 :
294 : int
295 0 : xl_pci_detach(struct device *self, int flags)
296 : {
297 0 : struct xl_pci_softc *psc = (void *)self;
298 0 : struct xl_softc *sc = &psc->psc_softc;
299 :
300 0 : if (sc->xl_intrhand != NULL) {
301 0 : pci_intr_disestablish(psc->psc_pc, sc->xl_intrhand);
302 0 : xl_detach(sc);
303 0 : }
304 0 : if (psc->psc_iosize > 0)
305 0 : bus_space_unmap(sc->xl_btag, sc->xl_bhandle, psc->psc_iosize);
306 0 : if (psc->psc_funsize > 0)
307 0 : bus_space_unmap(sc->xl_funct, sc->xl_funch, psc->psc_funsize);
308 0 : return (0);
309 : }
310 :
311 : void
312 0 : xl_pci_intr_ack(struct xl_softc *sc)
313 : {
314 0 : bus_space_write_4(sc->xl_funct, sc->xl_funch, XL_PCI_INTR,
315 : XL_PCI_INTRACK);
316 0 : }
317 :
318 : #ifndef SMALL_KERNEL
319 : void
320 0 : xl_pci_wol_power(void *ppsc)
321 : {
322 0 : struct xl_pci_softc *psc = (struct xl_pci_softc*)ppsc;
323 : u_int32_t command;
324 :
325 : /* Make sure wake-up generation is enabled. */
326 0 : command = pci_conf_read(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL);
327 0 : command |= XL_PME_EN;
328 0 : pci_conf_write(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL, command);
329 0 : }
330 : #endif
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