Line data Source code
1 : /* $OpenBSD: ohci_pci.c,v 1.40 2014/05/16 18:17:03 mpi Exp $ */
2 : /* $NetBSD: ohci_pci.c,v 1.23 2002/10/02 16:51:47 thorpej Exp $ */
3 :
4 : /*
5 : * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 : * All rights reserved.
7 : *
8 : * This code is derived from software contributed to The NetBSD Foundation
9 : * by Lennart Augustsson (lennart@augustsson.net) at
10 : * Carlstedt Research & Technology.
11 : *
12 : * Redistribution and use in source and binary forms, with or without
13 : * modification, are permitted provided that the following conditions
14 : * are met:
15 : * 1. Redistributions of source code must retain the above copyright
16 : * notice, this list of conditions and the following disclaimer.
17 : * 2. Redistributions in binary form must reproduce the above copyright
18 : * notice, this list of conditions and the following disclaimer in the
19 : * documentation and/or other materials provided with the distribution.
20 : *
21 : * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 : * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 : * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 : * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 : * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 : * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 : * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 : * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 : * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 : * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 : * POSSIBILITY OF SUCH DAMAGE.
32 : */
33 :
34 : /*
35 : * USB Open Host Controller driver.
36 : *
37 : * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
38 : * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
39 : */
40 :
41 : #include <sys/param.h>
42 : #include <sys/systm.h>
43 : #include <sys/kernel.h>
44 : #include <sys/device.h>
45 : #include <sys/timeout.h>
46 : #include <sys/queue.h>
47 :
48 : #include <machine/bus.h>
49 :
50 : #include <dev/pci/pcivar.h>
51 :
52 : #include <dev/usb/usb.h>
53 : #include <dev/usb/usbdi.h>
54 : #include <dev/usb/usbdivar.h>
55 : #include <dev/usb/usb_mem.h>
56 :
57 : #include <dev/usb/ohcireg.h>
58 : #include <dev/usb/ohcivar.h>
59 :
60 : int ohci_pci_match(struct device *, void *, void *);
61 : void ohci_pci_attach(struct device *, struct device *, void *);
62 : void ohci_pci_attach_deferred(struct device *);
63 : int ohci_pci_detach(struct device *, int);
64 :
65 : struct ohci_pci_softc {
66 : struct ohci_softc sc;
67 : pci_chipset_tag_t sc_pc;
68 : void *sc_ih; /* interrupt vectoring */
69 : };
70 :
71 : struct cfattach ohci_pci_ca = {
72 : sizeof(struct ohci_pci_softc), ohci_pci_match, ohci_pci_attach,
73 : ohci_pci_detach, ohci_activate
74 : };
75 :
76 : int
77 0 : ohci_pci_match(struct device *parent, void *match, void *aux)
78 : {
79 0 : struct pci_attach_args *pa = (struct pci_attach_args *) aux;
80 :
81 0 : if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
82 0 : PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
83 0 : PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI)
84 0 : return (1);
85 :
86 0 : return (0);
87 0 : }
88 :
89 : void
90 0 : ohci_pci_attach(struct device *parent, struct device *self, void *aux)
91 : {
92 0 : struct ohci_pci_softc *sc = (struct ohci_pci_softc *)self;
93 0 : struct pci_attach_args *pa = (struct pci_attach_args *)aux;
94 0 : pci_chipset_tag_t pc = pa->pa_pc;
95 : char const *intrstr;
96 0 : pci_intr_handle_t ih;
97 : int s;
98 : const char *vendor;
99 0 : char *devname = sc->sc.sc_bus.bdev.dv_xname;
100 :
101 : /* Map I/O registers */
102 0 : if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
103 0 : &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
104 0 : printf(": can't map mem space\n");
105 0 : return;
106 : }
107 :
108 : /* Record what interrupts were enabled by SMM/BIOS. */
109 0 : sc->sc.sc_intre = bus_space_read_4(sc->sc.iot, sc->sc.ioh,
110 : OHCI_INTERRUPT_ENABLE);
111 :
112 : /* Disable interrupts, so we don't get any spurious ones. */
113 0 : bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
114 : OHCI_MIE);
115 :
116 0 : sc->sc_pc = pc;
117 0 : sc->sc.sc_bus.dmatag = pa->pa_dmat;
118 :
119 0 : bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
120 : BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
121 0 : bus_space_write_4(sc->sc.iot, sc->sc.ioh,
122 : OHCI_INTERRUPT_DISABLE, OHCI_MIE);
123 :
124 0 : s = splusb();
125 : /* Map and establish the interrupt. */
126 0 : if (pci_intr_map(pa, &ih)) {
127 0 : printf(": couldn't map interrupt\n");
128 0 : bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
129 0 : splx(s);
130 0 : return;
131 : }
132 :
133 0 : intrstr = pci_intr_string(pc, ih);
134 0 : sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ohci_intr, sc, devname);
135 0 : if (sc->sc_ih == NULL) {
136 0 : printf(": couldn't establish interrupt");
137 0 : if (intrstr != NULL)
138 0 : printf(" at %s", intrstr);
139 0 : printf("\n");
140 0 : bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
141 0 : splx(s);
142 0 : return;
143 : }
144 0 : printf(": %s", intrstr);
145 :
146 : /* Figure out vendor for root hub descriptor. */
147 0 : vendor = pci_findvendor(pa->pa_id);
148 0 : sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
149 0 : if (vendor)
150 0 : strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
151 : else
152 0 : snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
153 0 : "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
154 :
155 : /* Display revision and perform legacy emulation handover. */
156 0 : if (ohci_checkrev(&sc->sc) != USBD_NORMAL_COMPLETION ||
157 0 : ohci_handover(&sc->sc) != USBD_NORMAL_COMPLETION) {
158 0 : bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
159 0 : pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
160 0 : splx(s);
161 0 : return;
162 : }
163 :
164 : /* Ignore interrupts for now */
165 0 : sc->sc.sc_bus.dying = 1;
166 :
167 0 : config_defer(self, ohci_pci_attach_deferred);
168 :
169 0 : splx(s);
170 :
171 0 : return;
172 0 : }
173 :
174 : void
175 0 : ohci_pci_attach_deferred(struct device *self)
176 : {
177 0 : struct ohci_pci_softc *sc = (struct ohci_pci_softc *)self;
178 : usbd_status r;
179 : int s;
180 :
181 0 : s = splusb();
182 :
183 0 : sc->sc.sc_bus.dying = 0;
184 :
185 0 : r = ohci_init(&sc->sc);
186 0 : if (r != USBD_NORMAL_COMPLETION) {
187 0 : printf("%s: init failed, error=%d\n",
188 0 : sc->sc.sc_bus.bdev.dv_xname, r);
189 0 : bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
190 0 : pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
191 0 : splx(s);
192 0 : return;
193 : }
194 0 : splx(s);
195 :
196 : /* Attach usb device. */
197 0 : config_found(self, &sc->sc.sc_bus, usbctlprint);
198 0 : }
199 :
200 : int
201 0 : ohci_pci_detach(struct device *self, int flags)
202 : {
203 0 : struct ohci_pci_softc *sc = (struct ohci_pci_softc *)self;
204 : int rv;
205 :
206 0 : rv = ohci_detach(self, flags);
207 0 : if (rv)
208 0 : return (rv);
209 :
210 0 : if (sc->sc_ih != NULL) {
211 0 : pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
212 0 : sc->sc_ih = NULL;
213 0 : }
214 0 : if (sc->sc.sc_size) {
215 0 : bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
216 0 : sc->sc.sc_size = 0;
217 0 : }
218 0 : return (0);
219 0 : }
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