|
Function Name  |
Hit count  |
| ci_apply_disp_minimum_voltage_request |
0 |
| ci_apply_state_adjust_rules |
0 |
| ci_calculate_mclk_params |
0 |
| ci_calculate_sclk_params |
0 |
| ci_check_s0_mc_reg_index |
0 |
| ci_clear_vc |
0 |
| ci_construct_voltage_tables |
0 |
| ci_convert_mc_reg_table_entry_to_smc |
0 |
| ci_convert_mc_reg_table_to_smc |
0 |
| ci_convert_mc_registers |
0 |
| ci_convert_to_vid |
0 |
| ci_copy_vbios_mc_reg_table |
0 |
| ci_do_enable_didt |
0 |
| ci_do_program_memory_timing_parameters |
0 |
| ci_dpm_debugfs_print_current_performance_level |
0 |
| ci_dpm_disable |
0 |
| ci_dpm_display_configuration_changed |
0 |
| ci_dpm_enable |
0 |
| ci_dpm_fini |
0 |
| ci_dpm_force_performance_level |
0 |
| ci_dpm_force_state_mclk |
0 |
| ci_dpm_force_state_pcie |
0 |
| ci_dpm_force_state_sclk |
0 |
| ci_dpm_get_current_mclk |
0 |
| ci_dpm_get_current_sclk |
0 |
| ci_dpm_get_mclk |
0 |
| ci_dpm_get_sclk |
0 |
| ci_dpm_init |
0 |
| ci_dpm_late_enable |
0 |
| ci_dpm_post_set_power_state |
0 |
| ci_dpm_powergate_uvd |
0 |
| ci_dpm_pre_set_power_state |
0 |
| ci_dpm_print_power_state |
0 |
| ci_dpm_set_power_state |
0 |
| ci_dpm_setup_asic |
0 |
| ci_dpm_start_smc |
0 |
| ci_dpm_stop_smc |
0 |
| ci_dpm_vblank_too_short |
0 |
| ci_enable_acpi_power_management |
0 |
| ci_enable_auto_throttle_source |
0 |
| ci_enable_didt |
0 |
| ci_enable_display_gap |
0 |
| ci_enable_ds_master_switch |
0 |
| ci_enable_power_containment |
0 |
| ci_enable_sclk_control |
0 |
| ci_enable_sclk_mclk_dpm |
0 |
| ci_enable_smc_cac |
0 |
| ci_enable_spread_spectrum |
0 |
| ci_enable_thermal_based_sclk_dpm |
0 |
| ci_enable_thermal_protection |
0 |
| ci_enable_ulv |
0 |
| ci_enable_uvd_dpm |
0 |
| ci_enable_vce_dpm |
0 |
| ci_enable_voltage_control |
0 |
| ci_enable_vr_hot_gpio_interrupt |
0 |
| ci_fan_ctrl_get_fan_speed_percent |
0 |
| ci_fan_ctrl_get_mode |
0 |
| ci_fan_ctrl_set_default_mode |
0 |
| ci_fan_ctrl_set_fan_speed_percent |
0 |
| ci_fan_ctrl_set_mode |
0 |
| ci_fan_ctrl_set_static_mode |
0 |
| ci_fan_ctrl_start_smc_fan_control |
0 |
| ci_fan_ctrl_stop_smc_fan_control |
0 |
| ci_find_boot_level |
0 |
| ci_find_dpm_states_clocks_in_dpm_table |
0 |
| ci_force_switch_to_arb_f0 |
0 |
| ci_freeze_sclk_mclk_dpm |
0 |
| ci_generate_dpm_level_enable_mask |
0 |
| ci_get_average_mclk_freq |
0 |
| ci_get_average_sclk_freq |
0 |
| ci_get_current_pcie_lane_number |
0 |
| ci_get_current_pcie_speed |
0 |
| ci_get_dependency_volt_by_clk |
0 |
| ci_get_dpm_level_enable_mask_value |
0 |
| ci_get_leakage_voltages |
0 |
| ci_get_lowest_enabled_level |
0 |
| ci_get_maximum_link_speed |
0 |
| ci_get_memory_type |
0 |
| ci_get_pi |
0 |
| ci_get_ps |
0 |
| ci_get_sleep_divider_id_from_clock |
0 |
| ci_get_std_voltage_value_sidd |
0 |
| ci_get_svi2_voltage_table |
0 |
| ci_get_vbios_boot_values |
0 |
| ci_get_vce_boot_level |
0 |
| ci_init_arb_table_index |
0 |
| ci_init_fps_limits |
0 |
| ci_init_sclk_t |
0 |
| ci_init_smc_table |
0 |
| ci_initial_switch_from_arb_f0_to_f1 |
0 |
| ci_initialize_mc_reg_table |
0 |
| ci_initialize_powertune_defaults |
0 |
| ci_min_max_v_gnbl_pm_lid_from_bapm_vddc |
0 |
| ci_notify_link_speed_change_after_state_change |
0 |
| ci_notify_smc_display_change |
0 |
| ci_parse_power_table |
0 |
| ci_parse_pplib_clock_info |
0 |
| ci_parse_pplib_non_clock_info |
0 |
| ci_patch_cac_leakage_table_with_vddc_leakage |
0 |
| ci_patch_clock_voltage_dependency_table_with_vddc_leakage |
0 |
| ci_patch_clock_voltage_dependency_table_with_vddci_leakage |
0 |
| ci_patch_clock_voltage_limits_with_vddc_leakage |
0 |
| ci_patch_dependency_tables_with_leakage |
0 |
| ci_patch_uvd_clock_voltage_dependency_table_with_vddc_leakage |
0 |
| ci_patch_vce_clock_voltage_dependency_table_with_vddc_leakage |
0 |
| ci_patch_vddc_phase_shed_limit_table_with_vddc_leakage |
0 |
| ci_patch_with_vddc_leakage |
0 |
| ci_patch_with_vddci_leakage |
0 |
| ci_populate_all_graphic_levels |
0 |
| ci_populate_all_memory_levels |
0 |
| ci_populate_and_upload_sclk_mclk_dpm_levels |
0 |
| ci_populate_bapm_parameters_in_dpm_table |
0 |
| ci_populate_bapm_vddc_base_leakage_sidd |
0 |
| ci_populate_bapm_vddc_vid_sidd |
0 |
| ci_populate_dw8 |
0 |
| ci_populate_fuzzy_fan |
0 |
| ci_populate_initial_mc_reg_table |
0 |
| ci_populate_mc_reg_addresses |
0 |
| ci_populate_memory_timing_parameters |
0 |
| ci_populate_mvdd_value |
0 |
| ci_populate_phase_value_based_on_mclk |
0 |
| ci_populate_phase_value_based_on_sclk |
0 |
| ci_populate_pm_base |
0 |
| ci_populate_single_graphic_level |
0 |
| ci_populate_single_memory_level |
0 |
| ci_populate_smc_acp_level |
0 |
| ci_populate_smc_acpi_level |
0 |
| ci_populate_smc_initial_state |
0 |
| ci_populate_smc_link_level |
0 |
| ci_populate_smc_mvdd_table |
0 |
| ci_populate_smc_samu_level |
0 |
| ci_populate_smc_uvd_level |
0 |
| ci_populate_smc_vce_level |
0 |
| ci_populate_smc_vddc_table |
0 |
| ci_populate_smc_vddci_table |
0 |
| ci_populate_smc_voltage_table |
0 |
| ci_populate_smc_voltage_tables |
0 |
| ci_populate_svi_load_line |
0 |
| ci_populate_tdc_limit |
0 |
| ci_populate_ulv_level |
0 |
| ci_populate_ulv_state |
0 |
| ci_populate_vddc_vid |
0 |
| ci_power_control_set_level |
0 |
| ci_process_firmware_header |
0 |
| ci_program_display_gap |
0 |
| ci_program_memory_timing_parameters |
0 |
| ci_program_pt_config_registers |
0 |
| ci_program_sstp |
0 |
| ci_program_vc |
0 |
| ci_read_clock_registers |
0 |
| ci_register_patching_mc_arb |
0 |
| ci_register_patching_mc_seq |
0 |
| ci_request_link_speed_change_before_state_change |
0 |
| ci_reset_single_dpm_table |
0 |
| ci_reset_to_default |
0 |
| ci_send_msg_to_smc_return_parameter |
0 |
| ci_send_msg_to_smc_with_parameter |
0 |
| ci_set_dpm_event_sources |
0 |
| ci_set_mc_special_registers |
0 |
| ci_set_overdrive_target_tdp |
0 |
| ci_set_power_limit |
0 |
| ci_set_private_data_variables_based_on_pptable |
0 |
| ci_set_s0_mc_reg_index |
0 |
| ci_set_temperature_range |
0 |
| ci_set_valid_flag |
0 |
| ci_setup_default_dpm_tables |
0 |
| ci_setup_default_pcie_tables |
0 |
| ci_setup_pcie_table_entry |
0 |
| ci_start_dpm |
0 |
| ci_stop_dpm |
0 |
| ci_thermal_enable_alert |
0 |
| ci_thermal_initialize |
0 |
| ci_thermal_set_temperature_range |
0 |
| ci_thermal_setup_fan_table |
0 |
| ci_thermal_start_smc_fan_control |
0 |
| ci_thermal_start_thermal_controller |
0 |
| ci_thermal_stop_thermal_controller |
0 |
| ci_trim_dpm_states |
0 |
| ci_trim_pcie_dpm_states |
0 |
| ci_trim_single_dpm_states |
0 |
| ci_unfreeze_sclk_mclk_dpm |
0 |
| ci_update_and_upload_mc_reg_table |
0 |
| ci_update_current_ps |
0 |
| ci_update_requested_ps |
0 |
| ci_update_sclk_t |
0 |
| ci_update_uvd_dpm |
0 |
| ci_update_vce_dpm |
0 |
| ci_upload_dpm_level_enable_mask |
0 |
| ci_upload_firmware |
0 |
| ci_write_smc_soft_register |
0 |