LCOV - code coverage report

Current view: top level - dev/pci/drm/radeon - rv6xx_dpm.c (source / functions) Hit Total Coverage Test: 6.4 Lines: 0 1242 0.0 % Date: 2018-10-19 03:25:38 Functions: 0 124 0.0 % Legend: Lines: hit not hit

Function Name	Hit count
calculate_memory_refresh_rate	0
rv6xx_calculate_ap	0
rv6xx_calculate_engine_speed_stepping_parameters	0
rv6xx_calculate_memory_clock_stepping_parameters	0
rv6xx_calculate_spread_spectrum_clk_s	0
rv6xx_calculate_spread_spectrum_clk_v	0
rv6xx_calculate_stepping_parameters	0
rv6xx_calculate_t	0
rv6xx_calculate_vco_frequency	0
rv6xx_calculate_voltage_stepping_parameters	0
rv6xx_can_step_post_div	0
rv6xx_clear_vc	0
rv6xx_clocks_per_unit	0
rv6xx_compute_count_for_delay	0
rv6xx_convert_clock_to_stepping	0
rv6xx_dpm_debugfs_print_current_performance_level	0
rv6xx_dpm_disable	0
rv6xx_dpm_display_configuration_changed	0
rv6xx_dpm_enable	0
rv6xx_dpm_fini	0
rv6xx_dpm_force_performance_level	0
rv6xx_dpm_get_current_mclk	0
rv6xx_dpm_get_current_sclk	0
rv6xx_dpm_get_mclk	0
rv6xx_dpm_get_sclk	0
rv6xx_dpm_init	0
rv6xx_dpm_print_power_state	0
rv6xx_dpm_set_power_state	0
rv6xx_enable_auto_throttle_source	0
rv6xx_enable_backbias	0
rv6xx_enable_bif_dynamic_pcie_gen2	0
rv6xx_enable_display_gap	0
rv6xx_enable_dynamic_backbias_control	0
rv6xx_enable_dynamic_pcie_gen2	0
rv6xx_enable_dynamic_spread_spectrum	0
rv6xx_enable_dynamic_voltage_control	0
rv6xx_enable_engine_feedback_and_reference_sync	0
rv6xx_enable_engine_spread_spectrum	0
rv6xx_enable_high	0
rv6xx_enable_l0s	0
rv6xx_enable_l1	0
rv6xx_enable_medium	0
rv6xx_enable_memory_spread_spectrum	0
rv6xx_enable_pcie_gen2_support	0
rv6xx_enable_pll_sleep_in_l1	0
rv6xx_enable_spread_spectrum	0
rv6xx_enable_static_voltage_control	0
rv6xx_enable_thermal_protection	0
rv6xx_find_memory_clock_with_highest_vco	0
rv6xx_force_pcie_gen1	0
rv6xx_generate_low_step	0
rv6xx_generate_single_step	0
rv6xx_generate_stepping_table	0
rv6xx_generate_steps	0
rv6xx_generate_transition_stepping	0
rv6xx_get_master_voltage_mask	0
rv6xx_get_pi	0
rv6xx_get_ps	0
rv6xx_invalidate_intermediate_steps	0
rv6xx_invalidate_intermediate_steps_range	0
rv6xx_memory_clock_entry_enable_post_divider	0
rv6xx_memory_clock_entry_set_feedback_divider	0
rv6xx_memory_clock_entry_set_post_divider	0
rv6xx_memory_clock_entry_set_reference_divider	0
rv6xx_next_post_div_step	0
rv6xx_next_vco_step	0
rv6xx_output_stepping	0
rv6xx_parse_power_table	0
rv6xx_parse_pplib_clock_info	0
rv6xx_parse_pplib_non_clock_info	0
rv6xx_program_at	0
rv6xx_program_backbias_stepping_parameters_except_lowest_entry	0
rv6xx_program_backbias_stepping_parameters_lowest_entry	0
rv6xx_program_bsp	0
rv6xx_program_display_gap	0
rv6xx_program_engine_speed_parameters	0
rv6xx_program_engine_spread_spectrum	0
rv6xx_program_fcp	0
rv6xx_program_git	0
rv6xx_program_mclk_spread_spectrum_parameters	0
rv6xx_program_mclk_stepping_entry	0
rv6xx_program_mclk_stepping_parameters_except_lowest_entry	0
rv6xx_program_mclk_stepping_parameters_lowest_entry	0
rv6xx_program_memory_timing_parameters	0
rv6xx_program_mpll_timing_parameters	0
rv6xx_program_power_level_enter_state	0
rv6xx_program_power_level_high	0
rv6xx_program_power_level_low	0
rv6xx_program_power_level_low_to_lowest_state	0
rv6xx_program_power_level_medium	0
rv6xx_program_power_level_medium_for_transition	0
rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry	0
rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry	0
rv6xx_program_sstp	0
rv6xx_program_stepping_parameters_except_lowest_entry	0
rv6xx_program_stepping_parameters_lowest_entry	0
rv6xx_program_tp	0
rv6xx_program_tpp	0
rv6xx_program_vc	0
rv6xx_program_vddc3d_parameters	0
rv6xx_program_voltage_gpio_pins	0
rv6xx_program_voltage_stepping_entry	0
rv6xx_program_voltage_stepping_parameters_except_lowest_entry	0
rv6xx_program_voltage_stepping_parameters_lowest_entry	0
rv6xx_program_voltage_timing_parameters	0
rv6xx_reached_stepping_target	0
rv6xx_reset_lvtm_data_sync	0
rv6xx_scale_count_given_unit	0
rv6xx_set_dpm_event_sources	0
rv6xx_set_engine_spread_spectrum_clk_s	0
rv6xx_set_engine_spread_spectrum_clk_v	0
rv6xx_set_memory_spread_spectrum_clk_s	0
rv6xx_set_memory_spread_spectrum_clk_v	0
rv6xx_set_safe_backbias	0
rv6xx_set_safe_pcie_gen2	0
rv6xx_set_sw_voltage_to_low	0
rv6xx_set_sw_voltage_to_safe	0
rv6xx_set_uvd_clock_after_set_eng_clock	0
rv6xx_set_uvd_clock_before_set_eng_clock	0
rv6xx_setup_asic	0
rv6xx_step_sw_voltage	0
rv6xx_step_voltage_if_decreasing	0
rv6xx_step_voltage_if_increasing	0
rv6xx_vid_response_set_brt	0

Generated by: LCOV version 1.13